Texas Instruments TMS570LC4357 User Manual

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2197
SPNU563A–March 2018
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Revision History
• Table 2-83: Changed Description of DIEIDL2 bit. Added last sentence ........................................................ 215
• Table 2-84: Changed Description of DIEIDH2 bit. Added last sentence........................................................ 216
• Figure 2-76: Changed register bit name to PS[7-0]QUAD[3-0]PROTSET...................................................... 225
• Table 2-90: Changed register bit name to PS[7-0]QUAD[3-0]PROTSET ...................................................... 225
• Table 2-90: Corrected register names in Description of PROTSET bit for Value = 1 (Write)................................ 225
• Figure 2-77: Changed register bit name to PS[15-8]QUAD[3-0]PROTSET .................................................... 226
• Table 2-91: Changed register bit name to PS[15-8]QUAD[3-0]PROTSET ..................................................... 226
• Table 2-91: Corrected register names in Description of PROTSET bit for Value = 1 (Write)................................ 226
• Figure 2-78: Changed register bit name to PS[23-16]QUAD[3-0]PROTSET................................................... 226
• Table 2-92: Changed register bit name to PS[23-16]QUAD[3-0]PROTSET ................................................... 226
• Table 2-92: Corrected register names in Description of PROTSET bit for Value = 1 (Write)................................ 226
• Figure 2-79: Changed register bit name to PS[31-24]QUAD[3-0]PROTSET................................................... 227
• Table 2-93: Changed register bit name to PS[31-24]QUAD[3-0]PROTSET ................................................... 227
• Table 2-93: Corrected register names in Description of PROTSET bit for Value = 1 (Write)................................ 227
• Figure 2-80: Changed register bit name to PS[7-0]QUAD[3-0]PROTCLR ..................................................... 227
• Table 2-94: Changed register bit name to PS[7-0]QUAD[3-0]PROTCLR ...................................................... 227
• Table 2-94: Corrected register names in Description of PROTCLR bit for Value = 1 (Write)................................ 227
• Figure 2-81: Changed register bit name to PS[15-8]QUAD[3-0]PROTCLR.................................................... 228
• Table 2-95: Changed register bit name to PS[15-8]QUAD[3-0]PROTCLR..................................................... 228
• Table 2-95: Corrected register names in Description of PROTCLR bit for Value = 1 (Write)................................ 228
• Figure 2-82: Changed register bit name to PS[23-16]QUAD[3-0]PROTCLR .................................................. 228
• Table 2-96: Changed register bit name to PS[23-16]QUAD[3-0]PROTCLR ................................................... 228
• Table 2-96: Corrected register names in Description of PROTCLR bit for Value = 1 (Write)................................ 228
• Figure 2-83: Changed register bit name to PS[31-24]QUAD[3-0]PROTCLR .................................................. 229
• Table 2-97: Changed register bit name to PS[31-24]QUAD[3-0]PROTCLR ................................................... 229
• Table 2-97: Corrected register names in Description of PROTCLR bit for Value = 1 (Write)................................ 229
• Section 2.5.3.30: Added paragraphs ................................................................................................ 240
• Section 2.5.3.30: Added NOTE....................................................................................................... 240
• Section 2.5.3.31: Added paragraph.................................................................................................. 242
• Section 2.5.3.32: Added paragraph.................................................................................................. 243
• Chapter 3: SCR Control Module (SCM)........................................................................................... 252
• Figure 3-1: Added footnote ........................................................................................................... 254
• Figure 3-2: Added footnote ........................................................................................................... 255
• Chapter 4: Interconnect ............................................................................................................. 265
• Table 4-1: Changed table. Added Access Mode column ......................................................................... 266
• Table 4-3: Changed table. Added Access Mode column ......................................................................... 268
• Table 4-3: Added footnote ............................................................................................................ 268
• Chapter 5: Power Management Module (PMM) ................................................................................. 279
• Figure 5-16: Updated Read/Write value of LCMPE bits to R/W1CP-0.......................................................... 298
• Chapter 6: I/O Multiplexing and Control Module (IOMM) ..................................................................... 301
• Section 6.2: Deleted second bullet................................................................................................... 302
• Section 6.3: Changed last sentence of third paragraph........................................................................... 303
• Table 6-1: Added N2HET1_NDIS at address 198h, ball D8, for Alternate Function 1 and 34[25] for Selection Bit ...... 304
• Table 6-1: Added N2HET2_NDIS at address 19Ch, ball D7, for Alternate Function 1 and 35[1] for Selection Bit ....... 304
• Table 6-1: Added footnote ............................................................................................................ 304
• Table 6-5: Corrected PINMMR163 bit number in Control Option B column for Events 6, 7, and 8 ......................... 315
• Section 6.5.6: Corrected terminal names in first two sentences of fourth paragraph ......................................... 319
• Section 6.5.6: Corrected first sentence of fifth paragraph. GIO module has four sources ................................... 319
• Figure 6-6: Corrected terminal names of first two terminals...................................................................... 319
• Table 6-9: Corrected bit value in middle column to = 1 ........................................................................... 323
• Section 6.5.13: Added NOTE......................................................................................................... 326
• Section 6.6.2: Deleted subsection Master ID Check. Subsequent subsection renumbered ................................. 327
• Section 6.7.3: Addd paragraph ....................................................................................................... 330

Texas Instruments TMS570LC4357 Specifications

General

Brand	Texas Instruments
Model	TMS570LC4357
Category	Microcontrollers
Language	English