Infineon Technologies TC1796 - Page 2124

User’s Manual L-8 V2.0, 2007-07
TC1796
System and Peripheral Units (Vol. 1 and 2)
Keyword Index
Reset control 7-39 [1]
User configuration blocks
Content definitions 7-27 [1]
Definitions 7-10 [1]
Overview 7-9 [1]
Structure 7-9 [1]
Write protection 7-27 [1], 7-30 [1]
FPI Buses 6-19 [1]
Basic operations 6-22 [1]
Block diagram 6-20 [1]
Overview 6-19 [1]
Transaction types 6-21 [1]
FPU
Interrupt 5-35 [1]
Fractional divider 3-29 [1]
Block diagram 3-30 [1]
FDR register 3-35 [1]
Function table 3-39 [1]
Implementation in the modules 3-40 [1]
Operating modes 3-32 [1]
Suspend mode 3-34 [1]
G
GPTA
Address ranges 24-274 [2]
Block diagram 24-6 [2]
Clock generation unit (CGU) 24-8 [2]
Clock distribution module 24-35 [2]
Digital phase locked loop cell
24-28 [2]
Duty cycle measurement unit
24-24 [2]
Filter and prescaler cell 24-10 [2]
Phase discrimination logic
24-19 [2]
Emergency stop output control 5-58 [1]
Features of GPTA0/GPTA1 24-3 [2]
Input IN1 control 5-49 [1]
Interrupt processing and control
24-112 [2], 24-231 [2]
Module implementations 24-247 [2]
Block diagram 24-248 [2]
Cascading limits 24-272 [2]
External registers 24-249 [2]
Input/output function selection
24-251 [2]
Module clock generation 24-265 [2]
On-chip connections 24-256 [2]
Port control and connections
24-250 [2]
Overview 24-2 [2]
Programming hints 24-148 [2]
Pseudo-code description 24-115 [2]
Registers
Address ranges 24-274 [2]
CKBCTR 24-173 [2]
DCMCAVk 24-163 [2]
DCMCOVk 24-164 [2]
DCMCTRk 24-161 [2]
DCMTIMk 24-163 [2]
FPCCTRk 24-156 [2]
FPCSTAT 24-155 [2]
FPCTIMk 24-158 [2]
GIMCRHg 24-200 [2]
GIMCRLg 24-198 [2]
GTCCTRk 24-175 [2], 24-177 [2]
GTCTRk 24-170 [2]
GTCXRk 24-179 [2]
GTREVk 24-172 [2]
GTTIMk 24-171 [2]
ID 24-154 [2]
LIMCRHg 24-204 [2]
LIMCRLg 24-202 [2]
LTCCTR63 24-188 [2]
LTCCTRk 24-180 [2]
LTCXR63 24-190 [2]
LTCXRk 24-190 [2]
MRACTL 24-191 [2]
MRADIN 24-193 [2]
MRADOUT 24-193 [2]
Offset addresses 11-53 [1],
24-151 [2]
OMCRHg 24-196 [2]
OMCRLg 24-194 [2]
Overview 24-150 [2]
PDLCTR 24-159 [2]