Infineon Technologies TC1796 - Page 2123

User’s Manual L-7 V2.0, 2007-07
TC1796
System and Peripheral Units (Vol. 1 and 2)
Keyword Index
Module implementation
Input function selection 26-61 [2]
Module clock control 26-58 [2]
Neighbor channel triggers 26-21 [2]
Registers
ACRx 26-45 [2]
CFGRx 26-41 [2]
CRRn 26-51 [2]
CRSR 26-30 [2]
FCRn 26-48 [2]
FMR 26-32 [2]
FRRn 26-55 [2]
GCR 26-37 [2]
ID 26-29 [2]
IRRmn 26-54 [2]
NCTR 26-34 [2]
Offset addresses 26-28 [2]
Overview 26-27 [2]
RCHx 26-47 [2]
Trigger modes 26-10 [2]
FDR register 3-35 [1]
Features
Development support 1-13 [1]
External bus interface 1-10 [1]
Instruction set 1-10 [1]
Interrupt system 1-11 [1]
On-chip memory 1-10 [1]
Flash
Block diagram 7-3 [1]
Command sequences overview
7-14 [1]
Commands
Clear Status 7-25 [1]
Disable Read Protection 7-24 [1]
Disable Write Protection 7-23 [1]
Enter Page Mode 7-15 [1]
Erase Sector 7-20 [1]
Erase User Configuration Block
7-22 [1]
Load Page Buffer 7-16 [1]
Reset-to-Read 7-15 [1]
Resume Protection 7-24 [1]
Write Page 7-18 [1]
Write User Configuration Page
7-19 [1]
Data Flash
Bank, sector, and page definitions
7-8 [1]
Features 7-8 [1]
Overview 7-7 [1]
Structure 7-7 [1]
EEPROM emulation 7-26 [1]
Error correction 7-34 [1]
Interrupt 5-36 [1]
Interrupt generation and control
7-36 [1]
Margin control 7-35 [1]
Operating modes 7-11 [1]
Command mode 7-12 [1]
Page mode 7-13 [1]
Read mode 7-11 [1]
OTP protection 7-30 [1]
Overview 7-2 [1]
Password check control 7-33 [1]
Power saving modes 7-38 [1]
Power supply 7-38 [1]
Program Flash
Bank, sector, and page definitions
7-6 [1]
Features 7-5 [1]
Overview 7-4 [1]
Structure 7-4 [1]
Protection configuration 7-59 [1]
Read protection 7-27 [1], 7-32 [1]
Register
Offset address 7-40 [1]
Registers
FCON 7-53 [1]
FSR 7-43 [1]
ID 7-41 [1]
MARD 7-52 [1]
MARP 7-51 [1]
Overview 7-40 [1]
PROCON0 7-59 [1]
PROCON1 7-60 [1]
PROCON2 7-61 [1]