EasyManua.ls Logo

Texas Instruments TMS320C6745 DSP - 14.2 Architecture; 14.2.1 Overview; Submodule Configuration Parameters

Texas Instruments TMS320C6745 DSP
1472 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Architecture
www.ti.com
288
SPRUH91DMarch 2013Revised September 2016
Submit Documentation Feedback
Copyright © 2013–2016, Texas Instruments Incorporated
Enhanced High-Resolution Pulse-Width Modulator (eHRPWM)
14.2 Architecture
Seven submodules are included in every ePWM peripheral. There are some instances that include a high-
resolution submodule that allows more precise control of the PWM outputs. Each of these submodules
performs specific tasks that can be configured by software.
14.2.1 Overview
Table 14-2 lists the eight key submodules together with a list of their main configuration parameters. For
example, if you need to adjust or control the duty cycle of a PWM waveform, then you should see the
counter-compare submodule in Section 14.2.4 for relevant details.
Table 14-2. Submodule Configuration Parameters
Submodule Configuration Parameter or Option Reference
Time-base (TB)
Scale the time-base clock (TBCLK) relative to the system clock
(SYSCLKOUT).
Configure the PWM time-base counter (TBCNT) frequency or period.
Set the mode for the time-base counter:
count-up mode: used for asymmetric PWM
count-down mode: used for asymmetric PWM
count-up-and-down mode: used for symmetric PWM
Configure the time-base phase relative to another ePWM module.
Synchronize the time-base counter between modules through hardware
or software.
Configure the direction (up or down) of the time-base counter after a
synchronization event.
Configure how the time-base counter will behave when the device is
halted by an emulator.
Specify the source for the synchronization output of the ePWM module:
Synchronization input signal
Time-base counter equal to zero
Time-base counter equal to counter-compare B (CMPB)
No output synchronization signal generated.
Section 14.2.3
Counter-compare (CC)
Specify the PWM duty cycle for output EPWMxA and/or output EPWMxB
Specify the time at which switching events occur on the EPWMxA or
EPWMxB output
Section 14.2.4
Action-qualifier (AQ)
Specify the type of action taken when a time-base or counter-compare
submodule event occurs:
No action taken
Output EPWMxA and/or EPWMxB switched high
Output EPWMxA and/or EPWMxB switched low
Output EPWMxA and/or EPWMxB toggled
Force the PWM output state through software control
Configure and control the PWM dead-band through software
Section 14.2.5
Dead-band (DB)
Control of traditional complementary dead-band relationship between
upper and lower switches
Specify the output rising-edge-delay value
Specify the output falling-edge delay value
Bypass the dead-band module entirely. In this case the PWM waveform
is passed through without modification.
Section 14.2.6
PWM-chopper (PC)
Create a chopping (carrier) frequency.
Pulse width of the first pulse in the chopped pulse train.
Duty cycle of the second and subsequent pulses.
Bypass the PWM-chopper module entirely. In this case the PWM
waveform is passed through without modification.
Section 14.2.7

Table of Contents

Related product manuals