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Texas Instruments TMS320C6745 DSP - Modem Control Register (MCR); Modem Control Register (MCR) Field Descriptions

Texas Instruments TMS320C6745 DSP
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Registers
1283
SPRUH91D–March 2013–Revised September 2016
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Copyright © 2013–2016, Texas Instruments Incorporated
Universal Asynchronous Receiver/Transmitter (UART)
29.3.7 Modem Control Register (MCR)
The modem control register (MCR) is shown in Figure 29-15 and described in Table 29-16. The modem
control register provides the ability to enable/disable the autoflow functions, and enable/disable the
loopback function for diagnostic purposes.
(1)
All UARTs do not support this feature, see your device-specific data manual for supported features. If this feature is not available, this bit
is reserved and should be cleared to 0.
Figure 29-15. Modem Control Register (MCR)
31 16
Reserved
R-0
15 6 5 4 3 2 1 0
Reserved AFE
(1)
LOOP OUT2 OUT1 RTS
(1)
Rsvd
R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 29-16. Modem Control Register (MCR) Field Descriptions
Bit Field Value Description
31-6 Reserved 0 Reserved
5 AFE Autoflow control enable. Autoflow control allows the UARTn_RTS and UARTn_CTS signals to provide
handshaking between UARTs during data transfer. When AFE = 1, the RTS bit determines the autoflow
control enabled. Note that all UARTs do not support this feature, see your device-specific data manual
for supported features. If this feature is not available, this bit is reserved and should be cleared to 0.
0 Autoflow control is disabled.
1 Autoflow control is enabled:
• When RTS = 0, UARTn_CTS is only enabled.
• When RTS = 1, UARTn_RTS and UARTn_CTS are enabled.
4 LOOP Loop back mode enable. LOOP is used for the diagnostic testing using the loop back feature.
0 Loop back mode is disabled.
1 Loop back mode is enabled. When LOOP is set, the following occur:
• The UARTn_TXD signal is set high.
• The UARTn_RXD pin is disconnected
• The output of the transmitter shift register (TSR) is lopped back in to the receiver shift register (RSR)
input.
3 OUT2 0 OUT2 Control Bit
2 OUT1 0 OUT1 Control Bit
1 RTS RTS control. When AFE = 1, the RTS bit determines the autoflow control enabled. Note that all UARTs
do not support this feature, see your device-specific data manual for supported features. If this feature
is not available, this bit is reserved and should be cleared to 0.
0 UARTn_RTS is disabled, UARTn_CTS is only enabled.
1 UARTn_RTS and UARTn_CTS are enabled.
0 Reserved 0 Reserved

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