Texas Instruments TMS320C6745 DSP - ECAP Interrupt Enable Register (ECEINT); ECAP Interrupt Enable Register (ECEINT) Field Descriptions

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SPRUH91D–March 2013–Revised September 2016
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Enhanced Capture (eCAP) Module
Figure 13-25. ECAP Interrupt Enable Register (ECEINT)
15 8
Reserved
R-0
7 6 5 4 3 2 1 0
CTR=CMP CTR=PRD CTROVF CEVT4 CEVT3 CEVT2 CETV1 Reserved
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 13-22. ECAP Interrupt Enable Register (ECEINT) Field Descriptions
Bit Field Value Description
15-8 Reserved 0 Reserved
7 CTR=CMP Counter Equal Compare Interrupt Enable
0 Disable Compare Equal as an Interrupt source
1 Enable Compare Equal as an Interrupt source
6 CTR=PRD Counter Equal Period Interrupt Enable
0 Disable Period Equal as an Interrupt source
1 Enable Period Equal as an Interrupt source
5 CTROVF Counter Overflow Interrupt Enable
0 Disable counter Overflow as an Interrupt source
1 Enable counter Overflow as an Interrupt source
4 CEVT4 Capture Event 4 Interrupt Enable
0 Disable Capture Event 4 as an Interrupt source
1 Enable Capture Event 4 as an Interrupt source
3 CEVT3 Capture Event 3 Interrupt Enable
0 Disable Capture Event 3 as an Interrupt source
1 Enable Capture Event 3 as an Interrupt source
2 CEVT2 Capture Event 2 Interrupt Enable
0 Disable Capture Event 2 as an Interrupt source
1 Enable Capture Event 2 as an Interrupt source
1 CEVT1 Capture Event 1 Interrupt Enable
0 Disable Capture Event 1 as an Interrupt source
1 Enable Capture Event 1 as an Interrupt source
0 Reserved 0 Reserved