Texas Instruments TMS320C6745 DSP - PLLDIV Ratio Change Status Register (DCHANGE); PLLDIV Ratio Change Status Register (DCHANGE) Field Descriptions

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SPRUH91D–March 2013–Revised September 2016
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Phase-Locked Loop Controller (PLLC)
7.4.19 PLLDIV Ratio Change Status Register (DCHANGE)
The PLLDIV ratio change status register (DCHANGE) is shown in Figure 7-20 and described in Table 7-
21. Indicates if SYSCLK divide ratio has been modified.
Figure 7-20. PLLDIV Ratio Change Status Register (DCHANGE)
31 16
Reserved
R-0
15 7 6 5 4 3 2 1 0
Reserved SYS7 SYS6 SYS5 SYS4 SYS3 SYS2 SYS1
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
LEGEND: R = Read only; -n = value after reset
Table 7-21. PLLDIV Ratio Change Status Register (DCHANGE) Field Descriptions
Bit Field Value Description
31-7 Reserved 0 Reserved
6 SYS7 SYSCLK7 divide ratio is modified.
0 Ratio is not modified.
1 Ratio is modified.
5 SYS6 SYSCLK6 divide ratio is modified.
0 Ratio is not modified.
1 Ratio is modified.
4 SYS5 SYSCLK5 divide ratio is modified.
0 Ratio is not modified.
1 Ratio is modified.
3 SYS4 SYSCLK4 divide ratio is modified.
0 Ratio is not modified.
1 Ratio is modified.
2 SYS3 SYSCLK3 divide ratio is modified.
0 Ratio is not modified.
1 Ratio is modified.
1 SYS2 SYSCLK2 divide ratio is modified.
0 Ratio is not modified.
1 Ratio is modified.
0 SYS1 SYSCLK1 divide ratio is modified.
0 Ratio is not modified.
1 Ratio is modified.