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Registers
1407
SPRUH91D–March 2013–Revised September 2016
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Universal Serial Bus 2.0 (USB) Controller
31.4.1 Revision Identification Register (REVID)
The revision identification register (REVID) contains the revision for the USB 2.0 OTG controller module.
The REVID is shown in Figure 31-27 and described in Table 31-31.
Figure 31-27. Revision Identification Register (REVID)
31 0
REV
R-4EA1 0800h
LEGEND: R = Read only; -n = value after reset
Table 31-31. Revision Identification Register (REVID) Field Descriptions
Bit Field Value Description
31-0 REV 4EA1 0800h Revision ID of the USB module.
31.4.2 Control Register (CTRLR)
The control register (CTRLR) allows the CPU to control various aspects of the module. The CTRLR is
shown in Figure 31-28 and described in Table 31-32.
Figure 31-28. Control Register (CTRLR)
31 16
Reserved
R-0
15 5 4 3 2 1 0
Reserved RNDIS UINT Reserved CLKFACK RESET
R-0 R/W-0 R/W-0 R-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 31-32. Control Register (CTRLR) Field Descriptions
Bit Field Value Description
31-5 Reserved 0 Reserved
4 RNDIS Global RNDIS mode enable for all endpoints.
0 Global RNDIS mode is disabled.
1 Global RNDIS mode is enabled.
3 UINT USB non-PDR interrupt handler enable.
0 PDR interrupt handler is enabled.
1 PDR interrupt handler is disabled.
2 Reserved 0 Reserved
1 CLKFACK Clock stop fast ACK enable.
0 Clock stop fast ACK is disabled.
1 Clock stop fast ACK is enabled.
0 RESET Soft reset.
0 No effect.
1 Writing a 1 starts a module reset. The USB controller will clear this bit when it completes reset.
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