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Texas Instruments TMS320C6745 DSP - 10.5 SYSCFG Registers; System Configuration Module (SYSCFG) Registers

Texas Instruments TMS320C6745 DSP
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SYSCFG Registers
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176
SPRUH91DMarch 2013Revised September 2016
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Copyright © 2013–2016, Texas Instruments Incorporated
System Configuration (SYSCFG) Module
10.5 SYSCFG Registers
Table 10-4 lists the memory-mapped registers for the system configuration module (SYSCFG).
(1)
This register is for internal-use only.
Table 10-4. System Configuration Module (SYSCFG) Registers
Address Acronym Register Description Section
01C1 4000h REVID Revision Identification Register Section 10.5.1
01C1 4008h DIEIDR0
(1)
Die Identification Register 0
01C1 400Ch DIEIDR1
(1)
Die Identification Register 1
01C1 4010h DIEIDR2
(1)
Die Identification Register 2
01C1 4014h DIEIDR3
(1)
Die Identification Register 3
01C1 4018h DEVIDR0 Device Identification Register 0 Section 10.5.2
01C1 4020h BOOTCFG Boot Configuration Register Section 10.5.3
01C1 4024h CHIPREVID Silicon Revision Identification Register Section 10.5.4
01C1 4038h KICK0R Kick 0 Register Section 10.5.5.1
01C1 403Ch KICK1R Kick 1 Register Section 10.5.5.2
01C1 4044h HOST1CFG Host 1 Configuration Register Section 10.5.6
01C1 40E0h IRAWSTAT Interrupt Raw Status/Set Register Section 10.5.7.1
01C1 40E4h IENSTAT Interrupt Enable Status/Clear Register Section 10.5.7.2
01C1 40E8h IENSET Interrupt Enable Register Section 10.5.7.3
01C1 40ECh IENCLR Interrupt Enable Clear Register Section 10.5.7.4
01C1 40F0h EOI End of Interrupt Register Section 10.5.7.5
01C1 40F4h FLTADDRR Fault Address Register Section 10.5.8.1
01C1 40F8h FLTSTAT Fault Status Register Section 10.5.8.2
01C1 4110h MSTPRI0 Master Priority 0 Register Section 10.5.9.1
01C1 4114h MSTPRI1 Master Priority 1 Register Section 10.5.9.2
01C1 4118h MSTPRI2 Master Priority 2 Register Section 10.5.9.3
01C1 4120h PINMUX0 Pin Multiplexing Control 0 Register Section 10.5.10.1
01C1 4124h PINMUX1 Pin Multiplexing Control 1 Register Section 10.5.10.2
01C1 4128h PINMUX2 Pin Multiplexing Control 2 Register Section 10.5.10.3
01C1 412Ch PINMUX3 Pin Multiplexing Control 3 Register Section 10.5.10.4
01C1 4130h PINMUX4 Pin Multiplexing Control 4 Register Section 10.5.10.5
01C1 4134h PINMUX5 Pin Multiplexing Control 5 Register Section 10.5.10.6
01C1 4138h PINMUX6 Pin Multiplexing Control 6 Register Section 10.5.10.7
01C1 413Ch PINMUX7 Pin Multiplexing Control 7 Register Section 10.5.10.8
01C1 4140h PINMUX8 Pin Multiplexing Control 8 Register Section 10.5.10.9
01C1 4144h PINMUX9 Pin Multiplexing Control 9 Register Section 10.5.10.10
01C1 4148h PINMUX10 Pin Multiplexing Control 10 Register Section 10.5.10.11
01C1 414Ch PINMUX11 Pin Multiplexing Control 11 Register Section 10.5.10.12
01C1 4150h PINMUX12 Pin Multiplexing Control 12 Register Section 10.5.10.13
01C1 4154h PINMUX13 Pin Multiplexing Control 13 Register Section 10.5.10.14
01C1 4158h PINMUX14 Pin Multiplexing Control 14 Register Section 10.5.10.15
01C1 415Ch PINMUX15 Pin Multiplexing Control 15 Register Section 10.5.10.16
01C1 4160h PINMUX16 Pin Multiplexing Control 16 Register Section 10.5.10.17
01C1 4164h PINMUX17 Pin Multiplexing Control 17 Register Section 10.5.10.18
01C1 4168h PINMUX18 Pin Multiplexing Control 18 Register Section 10.5.10.19
01C1 416Ch PINMUX19 Pin Multiplexing Control 19 Register Section 10.5.10.20
01C1 4170h SUSPSRC Suspend Source Register Section 10.5.11

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