TMS320C674x Megamodule
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SPRUH91D–March 2013–Revised September 2016
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DSP Subsystem
2.2 TMS320C674x Megamodule
The C674x megamodule (Figure 2-1) consists of the following components:
• TMS320C674x CPU
• Internal memory controllers:
– Level 1 program memory controller (PMC)
– Level 1 data memory controller (DMC)
– Level 2 unified memory controller (UMC)
– Extended memory controller (EMC)
– Internal direct memory access (IDMA) controller
• Internal peripherals:
– Interrupt controller (INTC)
– Power-down controller (PDC)
– Bandwidth manager (BWM)
• Advanced event triggering (AET)
2.2.1 Internal Memory Controllers
The C674x megamodule implements a two-level internal cache-based memory architecture with external
memory support. Level 1 memory (L1) is split into separate program memory (L1P memory) and data
memory (L1D memory). L1 memory is accessible to the CPU without stalls. Level 2 memory (L2) can also
be split into L2 RAM (normal addressable on-chip memory) and L2 cache for caching external memory
locations. The internal direct memory access controller (IDMA) manages DMA among the L1P, L1D, and
L2 memories.
For more information about each of these controllers, see the TMS320C674x DSP Megamodule
Reference Guide (SPRUFK5).
2.2.2 Internal Peripherals
The C674x megamodule includes the following internal peripherals:
• DSP interrupt controller (INTC)
• DSP power-down controller (PDC)
• Bandwidth manager (BWM)
• Internal DMA (IDMA) controller
This section briefly describes the INTC, PDC, BWM, and IDMA controller. For more information on these
internal peripherals, see the TMS320C674x DSP Megamodule Reference Guide (SPRUFK5).
2.2.2.1 Interrupt Controller (INTC)
The C674x megamodule includes an interrupt controller (INTC) to manage CPU interrupts. The INTC
maps DSP device events to 12 CPU interrupts. All DSP device events are listed in Table 2-1. The INTC is
fully described in the TMS320C674x DSP Megamodule Reference Guide (SPRUFK5).
Table 2-1. DSP Interrupt Map
Event Interrupt Name Source
0 EVT0 C674x Interrupt Control 0
1 EVT1 C674x Interrupt Control 1
2 EVT2 C674x Interrupt Control 2
3 EVT3 C674x Interrupt Control 3
4 T64P0_TINT12 Timer64P0 - TINT12
5 SYSCFG_CHIPINT2 SYSCFG CHIPSIG Register
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