Registers
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SPRUH91D–March 2013–Revised September 2016
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General-Purpose Input/Output (GPIO)
Figure 20-28. GPIO Bank 8 Input Data Register (IN_DATA8)
31 16
Reserved
R-0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
GP8P15 GP8P14 GP8P13 GP8P12 GP8P11 GP8P10 GP8P9 GP8P8 GP8P7 GP8P6 GP8P5 GP8P4 GP8P3 GP8P2 GP8P1 GP8P0
R-0
LEGEND: R = Read only; -n = value after reset
Table 20-9. GPIO Input Data Register (IN_DATAn) Field Descriptions
Bit Field Value Description
31-0 GPkPj Status of pin GPk[j]. Reading the GPkPj bit returns the state of pin j in GPIO bank k.
0 GPk[j] is logic low.
1 GPk[j] is logic high.