Texas Instruments TMS320C6745 DSP - I2 C Own Address Register (ICOAR); I2 C Own Address Register (ICOAR) Field Descriptions

Registers www.ti.com
906
SPRUH91D–March 2013–Revised September 2016
Submit Documentation Feedback
Copyright © 2013–2016, Texas Instruments Incorporated
Inter-Integrated Circuit (I2C) Module
22.3.1 I2C Own Address Register (ICOAR)
The I2C own address register (ICOAR) is used to specify its own slave address, which distinguishes it
from other slaves connected to the I2C-bus. If the 7-bit addressing mode is selected (XA = 0 in ICMDR),
only bits 6-0 are used; bits 9-7 are ignored. ICOAR is shown in Figure 22-13 and described in Table 22-5.
Figure 22-13. I2C Own Address Register (ICOAR)
31 16
Reserved
R-0
15 10 9 0
Reserved OADDR
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 22-5. I2C Own Address Register (ICOAR) Field Descriptions
Bit Field Value Description
31-10 Reserved 0 These reserved bit locations are always read as zeros. A value written to this field has no effect.
9-0 OADDR 0-3FFh Own slave address. Provides the slave address of the I2C.
In 7-bit addressing mode (XA = 0 in ICMDR): bits 6-0 provide the 7-bit slave address of the I2C. Bits 9-7
are ignored.
In 10-bit addressing mode (XA = 1 in ICMDR): bits 9-0 provide the 10-bit slave address of the I2C.