MPU Registers
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SPRUH91D–March 2013–Revised September 2016
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Memory Protection Unit (MPU)
5.3.11 Programmable Range n End Address Registers (PROGn_MPEAR)
The programmable range n end address register (PROGn_MPEAR) holds the end address for the range
n. This register is writeable by a supervisor entity only.
The end address must be aligned on a page boundary. The size of the page depends on the MPU: the
page size for MPU1 is 1 kByte; the page size for MPU2 is 64 kBytes. The size of the page determines the
width of the address field in the programmable range n start address register (PROGn_MPSAR) and
PROGn_MPEAR. For example, to protect a 64-kB page starting at byte address 8001 0000h, write
8001 0000h to PROGn_MPSAR and 8001 FFFFh to PROGn_MPEAR.
5.3.11.1 MPU1 Programmable Range n End Address Register (PROG1_MPEAR-PROG6_MPEAR)
The PROGn_MPEAR for MPU1 is shown in Figure 5-14 and described in Table 5-17.
Figure 5-14. MPU1 Programmable Range n End Address Register (PROGn_MPEAR)
31 10 9 0
END_ADDR Reserved
R/W-20 007Fh R-3FFh
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-17. MPU1 Programmable Range n End Address Register (PROGn_MPEAR)
Field Descriptions
Bit Field Value Description
31-10 END_ADDR 20 0000h–
20 007Fh
End address for range N.
9-0 Reserved 3FFh Reserved
5.3.11.2 MPU2 Programmable Range n End Address Register (PROG1_MPEAR-PROG12_MPEAR)
The PROGn_MPEAR for MPU2 is shown in Figure 5-15 and described in Table 5-18.
Figure 5-15. MPU2 Programmable Range n End Address Register (PROGn_MPEAR)
31 16 15 0
END_ADDR Reserved
R/W-DFFFh R-FFFFh
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 5-18. MPU2 Programmable Range n End Address Register (PROGn_MPEAR)
Field Descriptions
Bit Field Value Description
31-16 END_ADDR C000h–DFFFh Start address for range N.
15-0 Reserved FFFFh Reserved
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