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SPRUH91D–March 2013–Revised September 2016
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Enhanced High-Resolution Pulse-Width Modulator (eHRPWM)
Table 14-42. EPWM1 Initialization for Figure 14-57
Register Bit Value Comments
TBPRD TBPRD 800 (320h) Period = 1600 TBCLK counts
TBPHS TBPHS 0 Clear Phase Register to 0
TBCTL CTRMODE TB_UPDOWN
PHSEN TB_DISABLE Phase loading disabled
PRDLD TB_SHADOW
SYNCOSEL TB_CTR_ZERO Sync down-stream module
CMPCTL SHDWAMODE CC_SHADOW
SHDWBMODE CC_SHADOW
LOADAMODE CC_CTR_ZERO Load on CTR = 0
LOADBMODE CC_CTR_ZERO Load on CTR = 0
AQCTLA CAU AQ_SET Set actions for EPWM1A
CAD AQ_CLEAR
DBCTL MODE DB_FULL_ENABLE Enable Dead-band module
POLSEL DB_ACTV_HIC Active Hi complementary
DBFED DBFED 50 FED = 50 TBCLKs
DBRED 50 RED = 50 TBCLKs
Table 14-43. EPWM2 Initialization for Figure 14-57
Register Bit Value Comments
TBPRD TBPRD 800 (320h) Period = 1600 TBCLK counts
TBPHS TBPHS 0 Clear Phase Register to 0
TBCTL CTRMODE TB_UPDOWN
PHSEN TB_ENABLE Slave module
PRDLD TB_SHADOW
SYNCOSEL TB_SYNC_IN Sync flow-through
CMPCTL SHDWAMODE CC_SHADOW
SHDWBMODE CC_SHADOW
LOADAMODE CC_CTR_ZERO Load on CTR = 0
LOADBMODE CC_CTR_ZERO Load on CTR = 0
AQCTLA CAU AQ_SET Set actions for EPWM2A
CAD AQ_CLEAR
DBCTL MODE DB_FULL_ENABLE Enable Dead-band module
POLSEL DB_ACTV_HIC Active Hi complementary
DBFED DBFED 50 FED = 50 TBCLKs
DBRED 50 RED = 50 TBCLKs