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Texas Instruments TMS320C6745 DSP - Classical Dead-Band Operating Modes

Texas Instruments TMS320C6745 DSP
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Architecture
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326
SPRUH91DMarch 2013Revised September 2016
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Copyright © 2013–2016, Texas Instruments Incorporated
Enhanced High-Resolution Pulse-Width Modulator (eHRPWM)
Although all combinations are supported, not all are typical usage modes. Table 14-26 lists some classical
dead-band configurations. These modes assume that the DBCTL[IN_MODE] is configured such that
EPWMxA In is the source for both falling-edge and rising-edge delay. Enhanced, or non-traditional modes
can be achieved by changing the input signal source. The modes shown in Table 14-26 fall into the
following categories:
Mode 1: Bypass both falling-edge delay (FED) and rising-edge delay (RED) Allows you to fully
disable the dead-band submodule from the PWM signal path.
Mode 2-5: Classical Dead-Band Polarity Settings These represent typical polarity configurations that
should address all the active high/low modes required by available industry power switch gate drivers.
The waveforms for these typical cases are shown in Figure 14-30. Note that to generate equivalent
waveforms to Figure 14-30, configure the action-qualifier submodule to generate the signal as shown
for EPWMxA.
Mode 6: Bypass rising-edge-delay and Mode 7: Bypass falling-edge-delay Finally the last two
entries in Table 14-26 show combinations where either the falling-edge-delay (FED) or rising-edge-
delay (RED) blocks are bypassed.
(1)
These are classical dead-band modes and assume that DBCTL[IN_MODE] = 0,0. That is, EPWMxA in is the source for both the
falling-edge and rising-edge delays. Enhanced, non-traditional modes can be achieved by changing the IN_MODE configuration.
Table 14-26. Classical Dead-Band Operating Modes
Mode Mode Description
(1)
DBCTL[POLSEL] DBCTL[OUT_MODE]
S3 S2 S1 S0
1 EPWMxA and EPWMxB Passed Through (No Delay) x x 0 0
2 Active High Complementary (AHC) 1 0 1 1
3 Active Low Complementary (ALC) 0 1 1 1
4 Active High (AH) 0 0 1 1
5 Active Low (AL) 1 1 1 1
6 EPWMxA Out = EPWMxA In (No Delay) 0 or 1 0 or 1
0
1
EPWMxB Out = EPWMxA In with Falling Edge Delay
7 EPWMxA Out = EPWMxA In with Rising Edge Delay 0 or 1 0 or 1 1 0
EPWMxB Out = EPWMxB In with No Delay

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