Texas Instruments TMS320C6745 DSP - QDMA Event Enable Register (QEER); QDMA Event Enable Register (QEER) Field Descriptions

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SPRUH91D–March 2013–Revised September 2016
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Enhanced Direct Memory Access (EDMA3) Controller
16.4.2.7.2 QDMA Event Enable Register (QEER)
The EDMA3CC provides the option of selectively enabling/disabling each channel in the QDMA event
register (QER) by using the QDMA event enable register (QEER). If any of the event bits in QEER is set
to 1 (using the QDMA event enable set register, QEESR), it will enable that corresponding event.
Alternatively, if any event bit in QEER is cleared (using the QDMA event enable clear register, QEECR), it
will disable the corresponding QDMA channel. The QDMA event register will not latch any event for a
QDMA channel, if it is not enabled via QEER.
The QEER is shown in Figure 16-77 and described in Table 16-56.
Figure 16-77. QDMA Event Enable Register (QEER)
31 16
Reserved
R-0
15 8 7 6 5 4 3 2 1 0
Reserved E7 E6 E5 E4 E3 E2 E1 E0
R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0 R-0
LEGEND: R = Read only; -n = value after reset
Table 16-56. QDMA Event Enable Register (QEER) Field Descriptions
Bit Field Value Description
31-8 Reserved 0 Reserved
7-0 En QDMA event enable for channels 0-7.
0 QDMA channel n is not enabled. QDMA event will not be recognized and will not latch in the QDMA
event register (QER).
1 QDMA channel n is enabled. QDMA events will be recognized and will get latched in the QDMA event
register (QER).