Texas Instruments TMS320C6745 DSP - Trip-Zone Submodule Mode Control Logic; Trip-Zone Submodule Interrupt Logic

Generate
interrupt
pulsewhen
input=1
Clear
Set
TZCLR[INT]
EPWMxTZINT
(Interruptcontroller)
Latch
Clear
Set
Clear
Set
Latch
Latch
TZFLG[CBC]
TZFLG[OST]
TZEINT[CBC]
TZCLR[CBC]
CBC
tripevent
TZEINT[OST]
OSHT
tripevent
TZCLR[OST]
TZFLG[INT]
Latch
cyc−by-cyc
mode
(CBC)
CTR = 0
TZFRC[CBC]
TZ1
Sync
Clear
Set
Set
one-shot
Latch
(OSHT)
mode
Clear
TZSEL[CBC1 to CBCn]
TZCLR[OST]
TZFRC[OSHT]
Sync
Trip
logic
Trip
Trip
CBC
trip event
OSHT
trip event
EPWMxA
EPWMxB
EPWMxA
EPWMxB
TZCTL[TZB]
TZCTL[TZA]
Async Trip
Set
Clear
TZFLG[CBC]
TZCLR[CBC]
Set
Clear
TZFLG[OST]
TZn
TZ1
TZSEL[OSHT1 to OSHTn]
TZn
www.ti.com Architecture
335
SPRUH91D–March 2013–Revised September 2016
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Enhanced High-Resolution Pulse-Width Modulator (eHRPWM)
Figure 14-37. Trip-Zone Submodule Mode Control Logic
Figure 14-38. Trip-Zone Submodule Interrupt Logic