Registers
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SPRUH91D–March 2013–Revised September 2016
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Inter-Integrated Circuit (I2C) Module
22.3.15 I2C DMA Control Register (ICDMAC)
The I2C DMA control register (ICDMAC) is used to control the transmit DMA event and receive DMA
event pin to the system . ICDMAC is shown in Figure 22-29 and described in Table 22-22.
Figure 22-29. I2C DMA Control Register (ICDMAC)
31 16
Reserved
R-0
15 1 0
Reserved TXDMAEN RXDMAEN
R-0 R/W-1 R/W-1
LEGEND: R/W = Read/Write; R= Read only; -n = value after reset
Table 22-22. I2C DMA Control Register (ICDMAC) Field Descriptions
Bit Field Value Description
31-2 Reserved 0 These reserved bit locations are always read as zeros. A value written to this field has no effect.
1 TXDMAEN Transmit DMA enable. This bit controls the transmit DMA event pin to the system. Always set this bit to
1.
0 DMA transmit event is disabled.
1 DMA transmit event is enabled.
0 RXDMAEN Receive DMA enable . This bit controls the receive DMA event pin to the system. Always set this bit to
1.
0 DMA receive event is disabled.
1 DMA receive event is enabled.
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