Texas Instruments TMS320C6745 DSP - Receiver DMA Event Control Register (REVTCTL); Receiver DMA Event Control Register (REVTCTL) Field Descriptions

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SPRUH91D–March 2013–Revised September 2016
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Multichannel Audio Serial Port (McASP)
24.1.24 Receiver DMA Event Control Register (REVTCTL)
The receiver DMA event control register (REVTCTL) is shown in Figure 24-57 and described in Table 24-
32.
CAUTION
DSP specific registers
Accessing REVTCTL not implemented on a specific DSP may cause improper
device operation.
Figure 24-57. Receiver DMA Event Control Register (REVTCTL)
31 16
Reserved
(A)
R-0
15 1 0
Reserved
(A)
RDATDMA
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
A If writing to this field, always write the default value for future device compatibility.
Table 24-32. Receiver DMA Event Control Register (REVTCTL) Field Descriptions
Bit Field Value Description
31-1 Reserved 0 Reserved. The reserved bit location always returns the default value. A value written to this field has no
effect. If writing to this field, always write the default value for future device compatibility.
0 RDATDMA Receive data DMA request enable bit. If writing to this field, always write the default value of 0.
0 Receive data DMA request is enabled.
1 Reserved.