Registers
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SPRUH91D–March 2013–Revised September 2016
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Enhanced Direct Memory Access (EDMA3) Controller
16.4.1.4 Channel Destination Address Parameter (DST)
The channel destination address parameter (DST) specifies the starting byte address of the source. The
DST is shown in Figure 16-38 and described in Table 16-15.
Figure 16-38. Channel Destination Address Parameter (DST)
31 0
DST
R/W-x
LEGEND: R = Read only; -n = value after reset
Table 16-15. Channel Destination Address Parameter (DST) Field Descriptions
Bit Field Value Description
31-0 DST 0-FFFF FFFFh Destination address. Specifies the starting byte address of the destination where data is
transferred.
16.4.1.5 Source B Index/Destination B Index Parameter (SRC_DST_BIDX)
The source B index/destination B index parameter (SRC_DST_BIDX) specifies the value (2s complement)
used for source address modification between each array in the 2nd dimension and the value
(2s complement) used for destination address modification between each array in the 2nd dimension. The
SRC_DST_BIDX is shown in Figure 16-39 and described in Table 16-16.
Figure 16-39. Source B Index/Destination B Index Parameter (SRC_DST_BIDX)
31 16
DSTBIDX
R/W-x
15 0
SRCBIDX
R/W-x
LEGEND: R/W = Read/Write; -n = value after reset; -x = value is indeterminate after reset
Table 16-16. Source B Index/Destination B Index Parameter (SRC_DST_BIDX) Field Descriptions
Bit Field Value Description
31-16 DSTBIDX 0-FFFFh Destination B index. Signed value specifying the byte address offset between destination arrays
within a frame (2nd dimension). Valid values range from –32 768 and 32 767.
15-0 SRCBIDX 0-FFFFh Source B index. Signed value specifying the byte address offset between source arrays within a
frame (2nd dimension). Valid values range from –32 768 and 32 767.
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