Registers
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SPRUH91D–March 2013–Revised September 2016
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EMAC/MDIO Module
Table 17-8. EMAC Control Module Registers (continued)
Offset Acronym Register Description Section
68h C2TXSTAT EMAC Control Module Interrupt Core 2 Transmit Interrupt
Status Register
Section 17.3.1.10
6Ch C2MISCSTAT EMAC Control Module Interrupt Core 2 Miscellaneous Interrupt
Status Register
Section 17.3.1.11
70h C0RXIMAX EMAC Control Module Interrupt Core 0 Receive Interrupts Per
Millisecond Register
Section 17.3.1.12
74h C0TXIMAX EMAC Control Module Interrupt Core 0 Transmit Interrupts Per
Millisecond Register
Section 17.3.1.13
78h C1RXIMAX EMAC Control Module Interrupt Core 1 Receive Interrupts Per
Millisecond Register
Section 17.3.1.12
7Ch C1TXIMAX EMAC Control Module Interrupt Core 1 Transmit Interrupts Per
Millisecond Register
Section 17.3.1.13
80h C2RXIMAX EMAC Control Module Interrupt Core 2 Receive Interrupts Per
Millisecond Register
Section 17.3.1.12
84h C2TXIMAX EMAC Control Module Interrupt Core 2 Transmit Interrupts Per
Millisecond Register
Section 17.3.1.13
17.3.1.1 EMAC Control Module Revision ID Register (REVID)
The EMAC control module revision ID register (REVID) is shown in Figure 17-12 and described in
Table 17-9.
Figure 17-12. EMAC Control Module Revision ID Register (REVID)
31 0
REV
R-4EC8 0100h
LEGEND: R = Read only; -n = value after reset
Table 17-9. EMAC Control Module Revision ID Register (REVID) Field Descriptions
Bit Field Value Description
31-0 REV Identifies the EMAC Control Module revision.
4EC8 0100h Current revision of the EMAC Control Module.