Registers
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SPRUH91D–March 2013–Revised September 2016
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Enhanced Direct Memory Access (EDMA3) Controller
16.4.2.1.3 QDMA Channel n Mapping Register (QCHMAPn)
Each QDMA channel in EDMA3CC can be associated with any PaRAM set available on the device.
Furthermore, the specific trigger word (0-7) of the PaRAM set can be programmed. The PaRAM set
association and trigger word for every QDMA channel register is configurable using the QDMA channel n
mapping register (QCHMAPn). The QCHMAPn is shown in Figure 16-45 and described in Table 16-23.
NOTE: At reset the QDMA channel mapping registers for all QDMA channels point to the PaRAM
set 0. Prior to using any QDMA channel, QCHMAPn should be programmed appropriately to
point to a different PaRAM set.
Figure 16-45. QDMA Channel n Mapping Register (QCHMAPn)
31 16
Reserved
R-0
15 14 13 5 4 2 1 0
Reserved PAENTRY TRWORD Reserved
R-0 R/W-0 R/W-0 R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 16-23. QDMA Channel n Mapping Register (QCHMAPn) Field Descriptions
Bit Field Value Description
31-14 Reserved 0 Reserved
13-5 PAENTRY 0-1FFh PAENTRY points to the PaRAM set number for QDMA channel n.
0-7Fh PaRAM set number 0 through 127
80h-1FFh Reserved
4-2 TRWORD 0-7h Points to the specific PaRAM entry or the trigger word in the PaRAM set pointed to by
PAENTRY. A write to the trigger word results in a QDMA event being recognized.
1-0 Reserved 0 Reserved
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