Array 0 Array 1 Array 2 Array 3
Each array submit
as one TR
Array 0 Array 3Array 1 Array 2
(SRC|DST)
BIDX
(SRC|DST)
BIDX
(SRC|DST)
BIDX
(SRC|DST)
BIDX
(SRC|DST)
BIDX
(SRC|DST)
BIDX
(SRC|DST)
BIDX
Array 0
Array 3
(SRC|DST)
Array 1
BIDX BIDX
(SRC|DST)
Array 2
Frame 0
Frame 1
Frame 2
(SRC|DST)
CIDX
(SRC|DST)
CIDX
Architecture
www.ti.com
446
SPRUH91D–March 2013–Revised September 2016
Submit Documentation Feedback
Copyright © 2013–2016, Texas Instruments Incorporated
Enhanced Direct Memory Access (EDMA3) Controller
16.2.2.2 AB-Synchronized Transfers
In a AB-synchronized transfer, each EDMA3 sync event initiates the transfer of 2 dimensions or one
frame. In other words, each event/TR packet conveys information for one entire frame of BCNT arrays of
ACNT bytes. Thus, CCNT events are needed to completely service a PaRAM set.
Arrays are always separated by SRCBIDX and DSTBIDX as shown in Figure 16-6. Frames are always
separated by SRCCIDX and DSTCIDX.
Note that for AB-synchronized transfers, after a TR for the frame is submitted, the address update is to
add SRCCIDX/DSTCIDX to the beginning address of the beginning array in the frame. This is different
from A-synchronized transfers where the address is updated by adding SRCCIDX/DSTCIDX to the start
address of the last array in the frame. See Section 16.2.3.6 for details on parameter set updates.
Figure 16-6 shows an AB-synchronized transfer of 3 (CCNT) frames of 4 (BCNT) arrays of n (ACNT)
bytes. In this example, a total of 3 sync events (CCNT) exhaust a PaRAM set; that is, a total of 3 transfers
of 4 arrays each completes the transfer.
Figure 16-6. AB-Synchronized Transfers (ACNT = n, BCNT = 4, CCNT = 3)
NOTE: ABC-synchronized transfers are not directly supported. But can be logically achieved by
chaining between multiple AB-synchronized transfers.