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PSC Registers
149
SPRUH91D–March 2013–Revised September 2016
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Power and Sleep Controller (PSC)
8.6.1 Revision Identification Register (REVID)
The revision identification register (REVID) is shown in Figure 8-1 and described in Table 8-8.
Figure 8-1. Revision Identification Register (REVID)
31 0
REV
R-4482 3A00h
LEGEND: R = Read only; -n = value after reset
Table 8-8. Revision Identification Register (REVID) Field Descriptions
Bit Field Value Description
31-0 REV 4482 3A00h Peripheral revision ID.
8.6.2 Interrupt Evaluation Register (INTEVAL)
The interrupt evaluation register (INTEVAL) is shown in Figure 8-2 and described in Table 8-9.
Figure 8-2. Interrupt Evaluation Register (INTEVAL)
31 16
Reserved
R-0
15 1 0
Reserved ALLEV
R-0 W-0
LEGEND: R = Read only; W= Write only; -n = value after reset
Table 8-9. Interrupt Evaluation Register (INTEVAL) Field Descriptions
Bit Field Value Description
31-1 Reserved 0 Reserved
0 ALLEV Evaluate PSC interrupt (PSCn_ALLINT).
0 A write of 0 has no effect.
1 A write of 1 re-evaluates the interrupt condition.