Registers
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SPRUH91D–March 2013–Revised September 2016
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Enhanced Direct Memory Access (EDMA3) Controller
16.4.3.6.4 Source Active Destination Address Register (SADST)
The source active destination address register (SADST) is shown in Figure 16-94 and described in
Table 16-74.
Figure 16-94. Source Active Destination Address Register (SADST)
31 0
DADDR
R-0
LEGEND: R = Read only; -n = value after reset
Table 16-74. Source Active Destination Address Register (SADST) Field Descriptions
Bit Field Value Description
31-0 DADDR 0 Always reads as 0
16.4.3.6.5 Source Active B-Index Register (SABIDX)
The source active B-index register (SABIDX) is shown in Figure 16-95 and described in Table 16-75.
Figure 16-95. Source Active B-Index Register (SABIDX)
31 16
DSTBIDX
R-0
15 0
SRCBIDX
R-0
LEGEND: R = Read only; -n = value after reset
Table 16-75. Source Active B-Index Register (SABIDX) Field Descriptions
Bit Field Value Description
31-16 DSTBIDX 0 B-Index offset between destination arrays. Represents the offset in bytes between the starting
address of each destination. Always reads as 0.
15-0 SRCBIDX 0-FFFFh B-Index offset between source arrays. Represents the offset in bytes between the starting address
of each source array.