Texas Instruments TMS320C6745 DSP - Destination FIFO Set Source Address B-Reference Register (DFSRCBREF); Destination FIFO Set Destination Address B-Reference Register (DFDSTBREF); Destination FIFO Set Source Address B-Reference Register (DFSRCBREF) Field Descriptions; Destination FIFO Set Destination Address B-Reference Register (DFDSTBREF) Field Descriptions

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SPRUH91D–March 2013–Revised September 2016
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Enhanced Direct Memory Access (EDMA3) Controller
16.4.3.6.11 Destination FIFO Set Source Address B-Reference Register (DFSRCBREF)
The destination FIFO set source address B-reference register (DFSRCBREF) is shown in Figure 16-101
and described in Table 16-81.
Figure 16-101. Destination FIFO Set Source Address B-Reference Register (DFSRCBREF)
31 0
SADDRBREF
R-0
LEGEND: R = Read only; -n = value after reset
Table 16-81. Destination FIFO Set Source Address B-Reference Register (DFSRCBREF)
Field Descriptions
Bit Field Value Description
31-0 SADDRBREF 0 Not applicable. Always Read as 0.
16.4.3.6.12 Destination FIFO Set Destination Address B-Reference (DFDSTBREF)
The destination FIFO set destination address B-reference register (DFDSTBREF) is shown in
Figure 16-102 and described in Table 16-82.
Figure 16-102. Destination FIFO Set Destination Address B-Reference Register (DFDSTBREF)
31 0
DADDRBREF
R-0
LEGEND: R = Read only; -n = value after reset
Table 16-82. Destination FIFO Set Destination Address B-Reference Register (DFDSTBREF)
Field Descriptions
Bit Field Value Description
31-0 DADDRBREF 0-FFFF FFFFh Destination address reference for the destination FIFO register set. Represents the starting
address for the array currently being written.