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Registers
965
SPRUH91D–March 2013–Revised September 2016
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Liquid Crystal Display Controller (LCDC)
23.3.8.6 Palette Loading (PLM)
The 2-bit palette loading field describes how the palette loading behaves when each new frame is loaded
from memory.
• When PLM = 0, the data in the frame buffer represents the palette data and the picture data. Both
palette and picture data are loaded.
• When PLM = 1 (palette-only mode), the data in the frame buffer just represents a new palette to be
loaded. This data is loaded and placed into the palette. But be sure to turn off the LCD after getting the
loading interrupt, or the LCD behavior would be unpredictable.
• When PLM = 2h (data loading mode), the data in the frame buffer only represents the picture data
(data-only). This data is then used as an index (in the palette) or sent directly out. This mode assumes
the palette was previously loaded. There is no need to keep loading the palette if it is not changing. As
a matter of fact, in data-only mode, the BPP is fixed and can not change on the fly since the palette is
not loaded at every frame.
• PLM = 3h is reserved.
23.3.8.7 TFT Alternate Signal Mapping (TFT_ALT_MAP)
This bit is relevant only if TFT_ALT_MAP = 1.
This bit field controls how the TFT pixel data is output. Via this feature, 12-BPP data can be output to all
16-bit LCD pins (this also applies to 1-, 2-, 4-, and 8- BPP). This feature allows you to switch BPP modes
on the fly, duplicating the 12-bit output data across the 16 data lines if they are already hardwired to the
16 data lines.
Figure 23-26 shows how the four red, four green, and four blue bits are mapped to all pixel data [15-0]
output pins when TFT_ALT_MAP = 1.
Figure 23-26. TFT Alternate Signal Mapping Output
Pins 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Data R3 R2 R1 R0 R3 G3 G2 G1 G0 G3 G2 B3 B2 B1 B0 B3
When TFT_ALT_MAP = 0, the four red, four green, and four blue data are right-aligned on pixel data [11-
0]. The upper pixel data [15-12] are cleared to 0. There is no duplication.
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