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SPRUH91D–March 2013–Revised September 2016
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Host Port Interface (HPI)
21.3.3 GPIO Enable Register (GPIO_EN)
The GPIO enable register (GPIO_EN) enables the pin for general-purpose I/O. GPIO_EN is shown in
Figure 21-19 and described in Table 21-9.
Figure 21-19. GPIO Enable Register (GPIO_EN)
31 16
Reserved
R-0
15 9 8
Reserved GPIOEN8
R-0 R/W-0
7 6 5 4 3 2 1 0
GPIOEN7 GPIOEN6 GPIOEN5 GPIOEN4 Reserved GPIOEN2 GPIOEN1 GPIOEN0
R/W-0 R/W-0 R/W-0 R/W-0 R-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 21-9. GPIO Enable Register (GPIO_EN) Field Descriptions
Bit Field Value Description
31-9 Reserved 0 Reserved
8 GPIOEN8 Enable as GPIO for UHPI_HD[15:8] pins
0 Disable pins for GPIO. Pins functions as HPI signal.
1 Enable pins for GPIO.
7 GPIOEN7 Enable as GPIO for UHPI_HD[7:0] pins.
0 Disable pins for GPIO. Pins functions as HPI signal.
1 Enable pins for GPIO.
6 GPIOEN6 Enable as GPIO for UHPI_HINT pin.
0 Disable pin for GPIO. Pin functions as HPI signal.
1 Enable pin for GPIO.
5 GPIOEN5 Enable as GPIO for UHPI_HRDY pin.
0 Disable pin for GPIO. Pin functions as HPI signal.
1 Enable pin for GPIO.
4 GPIOEN4 Enable as GPIO for UHPI_HHWIL pin.
0 Disable pin for GPIO. Pin functions as HPI signal.
1 Enable pin for GPIO.
3 Reserved 0 Reserved
2 GPIOEN2 Enable as GPIO for UHPI_HAS pin.
0 Disable pin for GPIO. Pin functions as HPI signal.
1 Enable pin for GPIO.
1 GPIOEN1 Enable as GPIO for UHPI_HCNTL[1:0] pins.
0 Disable pins for GPIO. Pins functions as HPI signal.
1 Enable pins for GPIO.
0 GPIOEN0 Enable as GPIO for UHPI_HCS, UHPI_HDS1, UHPI_HDS2, UHPI_HR/W pins.
0 Disable pins for GPIO. Pins functions as HPI signal.
1 Enable pins for GPIO.