Registers
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SPRUH91D–March 2013–Revised September 2016
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EMAC/MDIO Module
17.3.3.6 Receive Teardown Register (RXTEARDOWN)
The receive teardown register (RXTEARDOWN) is shown in Figure 17-44 and described in Table 17-43.
Figure 17-44. Receive Teardown Register (RXTEARDOWN)
31 16
Reserved
R-0
15 3 2 0
Reserved RXTDNCH
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 17-43. Receive Teardown Register (RXTEARDOWN) Field Descriptions
Bit Field Value Description
31-3 Reserved 0 Reserved
2-0 RXTDNCH 0-7h Receive teardown channel. The receive channel teardown is commanded by writing the encoded value
of the receive channel to be torn down. The teardown register is read as 0.
0 Teardown receive channel 0
1h Teardown receive channel 1
2h Teardown receive channel 2
3h Teardown receive channel 3
4h Teardown receive channel 4
5h Teardown receive channel 5
6h Teardown receive channel 6
7h Teardown receive channel 7