Registers
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SPRUH91D–March 2013–Revised September 2016
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Enhanced Direct Memory Access (EDMA3) Controller
16.4.3.2 EDMA3TC Configuration Register (TCCFG)
The EDMA3TC configuration register (TCCFG) is shown in Figure 16-83 and described in Table 16-63.
Figure 16-83. EDMA3TC Configuration Register (TCCFG)
31 16
Reserved
R-0
15 10 9 8 7 6 5 4 3 2 0
Reserved DREGDEPTH Reserved BUSWIDTH Rsvd FIFOSIZE
R-0 R-x R-0 R-x R-0 R-x
LEGEND: R = Read only; -n = value after reset; -x = value is indeterminate after reset
Table 16-63. EDMA3TC Configuration Register (TCCFG) Field Descriptions
Bit Field Value Description
31-10 Reserved 0 Reserved
9-8 DREGDEPTH 0-3h Destination register FIFO depth parameterization.
0 1 entry
1h 2 entry
2h 4 entry (for EDMA3TC0 and EDMA3TC1)
3h Reserved
7-6 Reserved 0 Reserved
5-4 BUSWIDTH 0-3h Bus width parameterization.
0 32-bit
1h 64-bit (for EDMA3TC0 and EDMA3TC1)
2h-3h Reserved
3 Reserved 0 Reserved
2-0 FIFOSIZE 0-7h FIFO size.
0 32-byte FIFO
1h 64-byte FIFO
2h 128-byte FIFO (for EDMA3TC0 and EDMA3TC1)
3h 256-byte FIFO
4h-7h Reserved