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SPRUH91D–March 2013–Revised September 2016
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External Memory Interface B (EMIFB)
The two counters used to perform auto-refresh cycles are a 13-bit refresh interval counter and a 4-bit
refresh backlog counter. After SDREN = 1 and upon writing to the REFRESH_RATE field, the refresh
interval counter is loaded with the value from REFRESH_RATE field and begins decrementing, by one,
each EMIFB clock cycle. When the refresh interval counter reaches zero, the following actions occur:
• The refresh interval counter is reloaded with the value from the REFRESH_RATE field and restarts
decrementing.
• The 4-bit refresh backlog counter increments unless it has already reached its maximum value.
The refresh backlog counter records the number of auto refresh cycles that the EMIFB currently has
outstanding. This counter is decremented by one each time an auto refresh cycle is performed and
incremented by one each time the refresh interval counter expires. The refresh backlog counter saturates
at the values of 0000b and 1111b. The EMIFB uses the refresh backlog counter to determine the urgency
with which an auto refresh cycle is to be performed. The four levels of urgency are described in Table 19-
13. This refresh scheme allows the required refreshes to be performed with minimal impact on access
requests.
Table 19-13. Refresh Urgency Levels
Urgency Level
Refresh Backlog
Counter Range Action Taken
Refresh May 1-3 An auto-refresh cycle is performed only if the EMIFB has no requests pending and
none of the SDRAM banks are open.
Refresh Release 4-7 An auto-refresh cycle is performed if the EMIFB has no requests pending, regardless
of whether any SDRAM banks are open.
Refresh Need 8-11 An auto-refresh cycle is performed at the completion of the current access unless
there are read requests pending.
Refresh Must 12-15 Multiple auto-refresh cycles are performed at the completion of the current access
until the Refresh Release urgency level is reached. At that point, the EMIFB can begin
servicing any new read or write requests.
19.2.6.6.1 Determining the Appropriate Value for the REFRESH_RATE Field
The value programmed into the REFRESH_RATE field of SDRFC can be calculated by using the
frequency of the EMB_CLK signal (f
CLK
) and the required refresh rate of the SDRAM (f
Refresh
). The following
formula can be used:
REFRESH_RATE ≤ f
CLK
/ f
Refresh
The SDRAM datasheet often communicates the required SDRAM Refresh Rate in terms of the number of
REFR commands required in a given time interval. The required SDRAM Refresh Rate in the formula
above can be therefore be calculated by dividing the number of required cycles per time interval (n
cycles
) by
the time interval given in the datasheet (t
Refresh Period
) :
f
Refresh
= n
cycles
/ t
Refresh Period
Combining these formulas, the value programmed into the REFRESH_RATE field can be computed as:
REFRESH_RATE ≤ f
CLK
× t
Refresh Period
/ n
cycles
The following example illustrates calculating the value of REFRESH_RATE. Given that:
• f
CLK
= 133 MHz (frequency of the EMIFB clock)
• t
Refresh Period
= 64 ms (required refresh interval of the SDRAM)
• n
cycles
= 8192 (number of cycles in a refresh interval for the SDRAM)
REFRESH_RATE can be calculated as:
REFRESH_RATE = 133 MHz × 64 ms/8192
REFRESH_RATE = 1039.06
REFRESH_RATE = 1039 cycles = 40Fh cycles
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