Registers
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SPRUH91D–March 2013–Revised September 2016
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Liquid Crystal Display Controller (LCDC)
23.3.6 LCD LIDD CSn Address Read/Write Registers (LIDD_CS0_ADDR and LIDD_CS1_ADDR)
The LCD LIDD CS0 address read/write registers (LIDD_CSn_ADDR) are accessed by the processor to
perform the address/index read or write operations on the CS0 and CS1 device respectively. Writing to
LIDD_CS0_ADDR asserts CS0 and Address Latch Enable, which loads the ADR_INDX field of this
register into the address generator of the peripheral device. Likewise, reading from LIDD_CS0_ADDR
asserts CS0 and Address Latch Enable, which loads status information from the peripheral device into the
ADR_INDX field of this register. Similarly writing to LIDD_CS1_ADDR asserts CS1 and Address Latch
Enable, which loads the ADR_INDX field of this register into the address generator of the peripheral
device. Likewise, reading from LIDD_CS1_ADDR asserts CS1 and Address Latch Enable, which loads
status information from the peripheral device into the ADR_INDX field of this register. The
LIDD_CSn_ADDR is shown in Figure 23-20 and described in Table 23-16.
Figure 23-20. LCD LIDD CSn Address Read/Write Register (LIDD_CSn_ADDR)
31 16
Reserved
R-0
15 0
ADR_INDX
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 23-16. LCD LIDD CSn Address Read/Write Register (LIDD_CSn_ADDR) Field Descriptions
Bit Field Value Description
31-16 Reserved 0 Reserved
15-0 ADR_INDX 0-FFFFh Peripheral Device Address/Index value. On writes this field is loaded into the CS0 peripheral
device's address generator On reads this field contains the CS0 peripheral device's status.
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