EasyManua.ls Logo

Texas Instruments TMS320C6745 DSP - SPI Pin Control Register 1 (SPIPC1); SPI Pin Control Register 1 (SPIPC1) Field Descriptions

Texas Instruments TMS320C6745 DSP
1472 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
www.ti.com
Registers
1209
SPRUH91D–March 2013–Revised September 2016
Submit Documentation Feedback
Copyright © 2013–2016, Texas Instruments Incorporated
Serial Peripheral Interface (SPI)
27.3.7 SPI Pin Control Register 1 (SPIPC1)
The SPI pin control register 1 (SPIPC1) is shown in Figure 27-24 and described in Table 27-15.
Figure 27-24. SPI Pin Control Register 1 (SPIPC1)
31 16
Reserved
R-0
15 12 11 10 9 8
Reserved SOMIDIR SIMODIR CLKDIR ENADIR
R-0 R/W-0 R/W-0 R/W-0 R/W-0
7 1 0
Reserved SCS0DIR
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 27-15. SPI Pin Control Register 1 (SPIPC1) Field Descriptions
Bit Field Value Description
31-12 Reserved 0 Reads return zero and writes have no effect.
11 SOMIDIR SPIx_SOMI pin direction. Controls the direction of the SPIx_SOMI pin when it is used as a general-
purpose I/O pin. If the SPIx_SOMI pin is used as a SPI functional pin, the I/O direction is determined by
whether the SPI is configured as master or slave.
0 SPIx_SOMI pin is an input.
1 SPIx_SOMI pin is an output.
10 SIMODIR SPIx_SIMO pin direction. Controls the direction of the SPIx_SIMO pin when it is used as a general-
purpose I/O pin. If the SPIx_SIMO pin is used as a SPI functional pin, the I/O direction is determined by
whether the SPI is configured as master or slave.
0 SPIx_SIMO pin is an input.
1 SPIx_SIMO pin is an output.
9 CLKDIR SPIx_CLK pin direction. Controls the direction of the SPIx_CLK pin when it is used as a general-
purpose I/O pin. If the SPIx_CLK pin is used as a SPI functional pin, the I/O direction is determined by
whether the SPI is configured as master or slave.
0 SPIx_CLK pin is an input.
1 SPIx_CLK pin is an output.
8 ENADIR SPIx_ENA pin direction. Controls the direction of the SPIx_ENA pin when it is used as a general-
purpose I/O pin. If the SPIx_ENA pin is used as a SPI functional pin, then the I/O direction is
determined by whether the SPI is configured as master or slave.
0 SPIx_ENA pin is an input.
1 SPIx_ENA pin is an output.
7-1 Reserved 0 Reserved
0 SCS0DIR SPIx_SCS[0] pin direction. Controls the direction of the SPIx_SCS[0] pin when it is used as a general-
purpose I/O pin. If the SPIx_SCS[0] pin is used as a SPI functional pin, then the I/O direction is
determined by whether the SPI is configured as master or slave.
0 SPIx_SCS[0] pin is an input.
1 SPIx_SCS[0] pin is an output.

Table of Contents