Texas Instruments TMS320C6745 DSP - Using a GPIO Signal as an Output

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SPRUH91D–March 2013–Revised September 2016
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General-Purpose Input/Output (GPIO)
Table 20-1. GPIO Register Bits and Banks Associated With GPIO Signals (continued)
GPIO Pin Number GPIO Signal Name Bank Number Control Registers Register Bit Register Field
125 GP7[12] 7 register_name67 Bit 28 GP7P12
126 GP7[13] 7 register_name67 Bit 29 GP7P13
127 GP7[14] 7 register_name67 Bit 30 GP7P14
128 GP7[15] 7 register_name67 Bit 31 GP7P15
129 GP8[0] 8 register_name8 Bit 0 GP8P0
130 GP8[1] 8 register_name8 Bit 1 GP8P1
131 GP8[2] 8 register_name8 Bit 2 GP8P2
132 GP8[3] 8 register_name8 Bit 3 GP8P3
133 GP8[4] 8 register_name8 Bit 4 GP8P4
134 GP8[5] 8 register_name8 Bit 5 GP8P5
135 GP8[6] 8 register_name8 Bit 6 GP8P6
136 GP8[7] 8 register_name8 Bit 7 GP8P7
137 GP8[8] 8 register_name8 Bit 8 GP8P8
138 GP8[9] 8 register_name8 Bit 9 GP8P9
139 GP8[10] 8 register_name8 Bit 10 GP8P10
140 GP8[11] 8 register_name8 Bit 11 GP8P11
141 GP8[12] 8 register_name8 Bit 12 GP8P12
142 GP8[13] 8 register_name8 Bit 13 GP8P13
143 GP8[14] 8 register_name8 Bit 14 GP8P14
144 GP8[15] 8 register_name8 Bit 15 GP8P15
20.2.6 Using a GPIO Signal as an Output
GPIO signals are configured to operate as inputs or outputs by writing the appropriate value to the GPIO
direction register (DIR). This section describes using the GPIO signal as an output signal.
20.2.6.1 Configuring a GPIO Output Signal
To configure a given GPIO signal as an output, clear the bit in DIR that is associated with the desired
GPIO signal. For detailed information on DIR, see Section 20.3.
20.2.6.2 Controlling the GPIO Output Signal State
There are three registers that control the output state driven on a GPIO signal configured as an output:
1. GPIO set data register (SET_DATA) controls driving GPIO signals high.
2. GPIO clear data register (CLR_DATA) controls driving GPIO signals low.
3. GPIO output data register (OUT_DATA) contains the current state of the output signals.
Reading SET_DATA, CLR_DATA, and OUT_DATA returns the output state, not necessarily the actual
signal state (since some signals may be configured as inputs). The actual signal state is read using the
GPIO input data register (IN_DATA) associated with the desired GPIO signal. IN_DATA contains the
actual logic state on the external signal.
For detailed information on these registers, see Section 20.3.