Registers
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SPRUH91D–March 2013–Revised September 2016
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Enhanced Capture (eCAP) Module
13.4.4 Capture 2 Register (CAP2)
The capture 2 register (CAP2) is shown in Figure 13-20 and described in Table 13-17.
Figure 13-20. Capture 2 Register (CAP2)
31 0
CAP2
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 13-17. Capture 2 Register (CAP2) Field Descriptions
Bit Field Value Description
31-0 CAP2 0-FFFF FFFFh This register can be loaded (written) by:
• Time-Stamp (i.e., counter value) during a capture event
• Software - may be useful for test purposes
• ACMP active register when used in APWM mode
13.4.5 Capture 3 Register (CAP3)
The capture 3 register (CAP3) is shown in Figure 13-21 and described in Table 13-18.
Figure 13-21. Capture 3 Register (CAP3)
31 0
CAP3
R/W-0
LEGEND: R/W = Read/Write; -n = value after reset
Table 13-18. Capture 3 Register (CAP3) Field Descriptions
Bit Field Value Description
31-0 CAP3 0-FFFF FFFFh In CMP mode, this is a time-stamp capture register. In APWM mode, this is the period shadow
(APRD) register. You update the PWM period value through this register. In this mode, CAP3
shadows CAP1.