Texas Instruments TMS320C6745 DSP - Functional Block Diagram; Mcasp Block Diagram

Transmit
formatunit
Receive
formatunit
Transmit
state
machine
Transmit
TDM
sequencer
Receive
state
machine
Receive
TDM
sequencer
Control
32
32
32
32
Serializer0
Serializer1
Serializern
AXR0
AXR1
AXRn
(A)
Clock
generator
Framesync
generator
AUXCLK
Clock
generator
Framesync
generator
AUXCLK
Transmit
Receive
Control
GPIO
Errorcheck
ACLKX
AHCLKX
AFSX
AFSR
AHCLKR
ACLKR
AMUTE
AMUTEIN
(B)
AXEVT
AREVT
AXINT
ARINT
DMA events
Interrupts
Clockcheck
circuit
Audio
FIFO
WFIFO
RFIFO
FIFO
CONTROL/
STATUS
AXEVT
AREVT
DMA events
DMA bus
Peripheralconfigurationbus
Pinfunctioncontrol
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984
SPRUH91D–March 2013–Revised September 2016
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Multichannel Audio Serial Port (McASP)
24.0.18 Functional Block Diagram
A block diagram of the McASP is shown in Figure 24-1. The McASP has independent receive/transmit
clock generators and frame sync generators.
Figure 24-1. McASP Block Diagram
A McASP0 has up to 16 serial data pins, n = 15; McASP1 has up to 12 serial data pins, n = 11;
McASP2 has up to 4 serial data pins, n = 3.
B One of the DSP's external pins, see your device-specific data manual.