Overview
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SPRUH91D–March 2013–Revised September 2016
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Device Clocking
6.1 Overview
This device requires two primary reference clocks:
• One reference clock is required for the phase-locked loop controller (PLLC)
• One reference clock is required for the real-time clock (RTC) module. The RTC is not supported on the
C6745 DSP.
These reference clocks may be sourced from either a crystal input or by an external oscillator. For detailed
specifications on clock frequency and voltage requirements, see the device-specific data manual.
In addition to the reference clocks required for the PLLC and RTC module, some peripherals, such as the
USB, may also require an input reference clock to be supplied. All possible input clocks are described in
Table 6-1. The CPU and the majority of the device peripherals operate at fixed ratios of the primary
system/CPU clock frequency, as listed in Table 6-2. However, there are three system clock domains that
do not require a fixed ratio to the CPU clock frequency, these are SYSCLK3, SYSCLK5, and SYSCLK7.
Figure 6-1 shows the clocking architecture.
(1)
This peripheral is not supported on the C6745 DSP.
(2)
McASP2 is not supported on the C6745 DSP; only McASP0 and McASP1 are supported on the C6745
DSP.
Table 6-1. Device Clock Inputs
Peripheral Input Clock Signal Name
Oscillator/PLL OSCIN
RTC
(1)
RTC_XI
JTAG TCK
EMAC RMII_MHZ_50_CLK
USB2.0 and USB1.1
(1)
USB_REFCLKIN
McASPs
(2)
ACLKRn, AHCLKRn, ACLKXn, AHCLKXn
I2Cs I2Cn_SCL
SPIs SPIn_CLK
Timer0 TM64P0_IN12
(1)
This peripheral is not supported on the C6745 DSP.
(2)
McASP2 is not supported on the C6745 DSP; only McASP0 and McASP1 are supported on the C6745 DSP.
Table 6-2. System Clock Domains
CPU/Device Peripherals System Clock Domain
Fixed Ratio to
CPU Clock Required?
Default Ratio to
CPU Clock
DSP SYSCLK1 Yes 1:1
PRU, UARTs, EDMA, SPIs, MMC/SD, Shared RAM
(1)
,
eCAPs, eQEPs, eHRPWMs, LCDC
(1)
, HPI
(1)
,
McASPs
(2)
, USB2.0, EMIFB
SYSCLK2 Yes 1:2
EMIFA SYSCLK3 No 1:3
SYSCFG, PSCs, I2C1, USB1.1
(1)
, EMAC/MDIO, GPIO SYSCLK4 Yes 1:4
EMIFB I/O Clock SYSCLK5 No 1:3
EMAC SYSCLK7 No 1:6
I2C0, Timers, McASP serial clock
(2)
, RTC
(1)
, USB2.0 AUXCLK Not Applicable PLL Bypass
Clock
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