Texas Instruments TMS320C6745 DSP - Page 773

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SPRUH91D–March 2013–Revised September 2016
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External Memory Interface A (EMIFA)
Table 18-60. NAND Flash Control Register (NANDFCR) Field Descriptions (continued)
Bit Field Value Description
5-4 4BITECCSEL 0-3h 4-bit ECC selection. This field selects the chip select on which 4-bit ECC will be
calculated.
0 ECC will be calculated for CS2.
1h ECC will be calculated for CS3.
2h ECC will be calculated for CS4.
3h ECC will be calculated for CS5.
3 CS5NAND NAND Flash mode for chip select 5.
0 Not using NAND Flash.
1 Using NAND Flash on EMA_CS5.
2 CS4NAND NAND Flash mode for chip select 4.
0 Not using NAND Flash.
1 Using NAND Flash on EMA_CS4.
1 CS3NAND NAND Flash mode for chip select 3.
0 Not using NAND Flash.
1 Using NAND Flash on EMA_CS3.
0 CS2NAND NAND Flash mode for chip select 2.
0 Not using NAND Flash.
1 Using NAND Flash on EMA_CS2.