Texas Instruments TMS320C6745 DSP - Page 18

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18
SPRUH91D–March 2013–Revised September 2016
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Copyright © 2013–2016, Texas Instruments Incorporated
Contents
30.3.9 HC Head Control Register (HCCONTROLHEADED) .................................................... 1307
30.3.10 HC Current Control Register (HCCONTROLCURRENTED)........................................... 1307
30.3.11 HC Head Bulk Register (HCBULKHEADED) ............................................................ 1308
30.3.12 HC Current Bulk Register (HCBULKCURRENTED) .................................................... 1308
30.3.13 HC Head Done Register (HCDONEHEAD) .............................................................. 1309
30.3.14 HC Frame Interval Register (HCFMINTERVAL)......................................................... 1309
30.3.15 HC Frame Remaining Register (HCFMREMAINING) .................................................. 1310
30.3.16 HC Frame Number Register (HCFMNUMBER) ......................................................... 1310
30.3.17 HC Periodic Start Register (HCPERIODICSTART) ..................................................... 1311
30.3.18 HC Low-Speed Threshold Register (HCLSTHRESHOLD)............................................. 1311
30.3.19 HC Root Hub A Register (HCRHDESCRIPTORA)...................................................... 1312
30.3.20 HC Root Hub B Register (HCRHDESCRIPTORB)...................................................... 1313
30.3.21 HC Root Hub Status Register (HCRHSTATUS)......................................................... 1314
30.3.22 HC Port 1 Status and Control Register (HCRHPORTSTATUS1) ..................................... 1315
30.3.23 HC Port 2 Status and Control Register (HCRHPORTSTATUS2) ..................................... 1317
31 Universal Serial Bus 2.0 (USB) Controller .......................................................................... 1319
31.1 Introduction............................................................................................................... 1320
31.1.1 Purpose of the Peripheral.................................................................................... 1320
31.1.2 Features ........................................................................................................ 1320
31.1.3 Functional Block Diagram.................................................................................... 1320
31.1.4 Industry Standard(s) Compliance Statement .............................................................. 1321
31.2 Architecture .............................................................................................................. 1321
31.2.1 Clock Control .................................................................................................. 1321
31.2.2 Signal Descriptions............................................................................................ 1323
31.2.3 Indexed and Non-Indexed Registers ....................................................................... 1323
31.2.4 USB PHY Initialization........................................................................................ 1324
31.2.5 VBUS Voltage Sourcing Control ............................................................................ 1324
31.2.6 Dynamic FIFO Sizing ......................................................................................... 1324
31.2.7 USB Controller Host and Peripheral Modes Operation .................................................. 1325
31.2.8 Communications Port Programming Interface (CPPI) 4.1 DMA Overview ............................ 1361
31.2.9 Test Modes..................................................................................................... 1385
31.2.10 Reset Considerations ....................................................................................... 1387
31.2.11 Interrupt Support............................................................................................. 1387
31.2.12 DMA Event Support ......................................................................................... 1387
31.2.13 Power Management ......................................................................................... 1387
31.3 Use Cases................................................................................................................ 1388
31.3.1 User Case 1: Example of How to Initialize the USB Controller ......................................... 1388
31.3.2 User Case 2: Example of How to Program the USB Endpoints in Peripheral Mode................. 1392
31.3.3 User Case 3: Example of How to Program the USB Endpoints in Host Mode........................ 1393
31.3.4 User Case 4: Example of How to Program the USB DMA Controller.................................. 1395
31.4 Registers ................................................................................................................. 1400
31.4.1 Revision Identification Register (REVID)................................................................... 1407
31.4.2 Control Register (CTRLR).................................................................................... 1407
31.4.3 Status Register (STATR)..................................................................................... 1408
31.4.4 Emulation Register (EMUR) ................................................................................. 1408
31.4.5 Mode Register (MODE) ...................................................................................... 1409
31.4.6 Auto Request Register (AUTOREQ) ....................................................................... 1411
31.4.7 SRP Fix Time Register (SRPFIXTIME) .................................................................... 1412
31.4.8 Teardown Register (TEARDOWN).......................................................................... 1412
31.4.9 USB Interrupt Source Register (INTSRCR) ............................................................... 1413
31.4.10 USB Interrupt Source Set Register (INTSETR).......................................................... 1414
31.4.11 USB Interrupt Source Clear Register (INTCLRR) ....................................................... 1415
31.4.12 USB Interrupt Mask Register (INTMSKR)................................................................ 1416