Texas Instruments TMS570LC4357 User Manual

Control Registers and Control Packets www.ti.com
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SPNU563A–March 2018
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Direct Memory Access Controller (DMA) Module
Table 20-7. DMA Control Registers (continued)
Offset Acronym Register Description Section
124h FTCFLAG FTC Interrupt Flag Register Section 20.3.1.38
12Ch LFSFLAG LFS Interrupt Flag Register Section 20.3.1.39
134h HBCFLAG HBC Interrupt Flag Register Section 20.3.1.40
13Ch BTCFLAG BTC Interrupt Flag Register Section 20.3.1.41
144h BERFLAG BER Interrupt Flag Register Section 20.3.1.42
14Ch FTCAOFFSET FTCA Interrupt Channel Offset Register Section 20.3.1.43
150h LFSAOFFSET LFSA Interrupt Channel Offset Register Section 20.3.1.44
154h HBCAOFFSET HBCA Interrupt Channel Offset Register Section 20.3.1.45
158h BTCAOFFSET BTCA Interrupt Channel Offset Register Section 20.3.1.46
160h FTCBOFFSET FTCB Interrupt Channel Offset Register Section 20.3.1.47
164h LFSBOFFSET LFSB Interrupt Channel Offset Register Section 20.3.1.48
168h HBCBOFFSET HBCB Interrupt Channel Offset Register Section 20.3.1.49
16Ch BTCBOFFSET BTCB Interrupt Channel Offset Register Section 20.3.1.50
178h PTCRL Port Control Register Section 20.3.1.51
17Ch RTCTRL RAM Test Control Register Section 20.3.1.52
180h DCTRL Debug Control Register Section 20.3.1.53
184h WPR Watch Point Register Section 20.3.1.54
188h WMR Watch Mask Register Section 20.3.1.55
18Ch FAACSADDR FIFO A Active Channel Source Address Register
190h FAACDADDR FIFO A Active Channel Destination Address Register
194h FAACTC FIFO A Active Channel Transfer Address Register
198h FBACSADDR FIFO B Active Channel Source Address Register Section 20.3.1.56
19Ch FBACDADDR FIFO B Active Channel Destination Address Register Section 20.3.1.57
1A0h FBACTC FIFO B Active Channel Transfer Address Register Section 20.3.1.58
1A8h DMAPECR Parity Control Register Section 20.3.1.62
1ACh DMAPAR DMA Parity Error Address Register Section 20.3.1.63
1B0h DMAMPCTRL1 DMA Memory Protection Control Register 1 Section 20.3.1.64
1B4h DMAMPST1 DMA Memory Protection Status Register 1 Section 20.3.1.65
1B8h DMAMPR0S DMA Memory Protection Region 0 Start Address Register Section 20.3.1.66
1BCh DMAMPR0E DMA Memory Protection Region 0 End Address Register Section 20.3.1.67
1C0h DMAMPR1S DMA Memory Protection Region 1 Start Address Register Section 20.3.1.68
1C4h DMAMPR1E DMA Memory Protection Region 1 End Address Register Section 20.3.1.69
1C8h DMAMPR2S DMA Memory Protection Region 2 Start Address Register Section 20.3.1.70
1CCh DMAMPR2E DMA Memory Protection Region 2 End Address Register Section 20.3.1.71
1D0h DMAMPR3S DMA Memory Protection Region 3 Start Address Register Section 20.3.1.72
1D4h DMAMPR3E DMA Memory Protection Region 3 End Address Register Section 20.3.1.73
1D8h DMAMPCTRL DMA Memory Protection Control Register Section 20.3.1.74
1DCh DMAMPST2 DMA Memory Protection Status Register 2 Section 20.3.1.75
1E0h DMAMPR4S DMA Memory Protection Region 4 Start Address Register Section 20.3.1.76
1E4h DMAMPR4E DMA Memory Protection Region 4 End Address Register Section 20.3.1.77
1E8h DMAMPR5S DMA Memory Protection Region 5 Start Address Register Section 20.3.1.78
1ECh DMAMPR5E DMA Memory Protection Region 5End Address Register Section 20.3.1.79
1F0h DMAMPR6S DMA Memory Protection Region 6 Start Address Register Section 20.3.1.80
1F4h DMAMPR6E DMA Memory Protection Region 6 End Address Register Section 20.3.1.81
1F8h DMAMPR7S DMA Memory Protection Region 7 Start Address Register Section 20.3.1.82
1FCh DMAMPR7E DMA Memory Protection Region 7 End Address Register Section 20.3.1.83
228h DMASECCCTRL DMA Single-bit ECC Control Register Section 20.3.1.84

Texas Instruments TMS570LC4357 Specifications

General

Brand	Texas Instruments
Model	TMS570LC4357
Category	Microcontrollers
Language	English