Texas Instruments TMS320C6745 DSP - Page 804

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SPRUH91D–March 2013–Revised September 2016
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External Memory Interface B (EMIFB)
Power Management Using Clock Stop
LPSC of EMIFB memory controller can be programmed to be in one of the following states:
• Enable
• Disable
• Auto sleep
• Auto wake
• Sync reset
Each of the states is described in the following sections.
LPSC Disable and Enable
To achieve maximum power savings VCLK, MCLK and EMB_CLK should be gated off. Perform the
following procedure when shutting down clocks to achieve maximum power savings:
• EMIFB should be put to self-refresh mode before stopping the clock. Refer to Section 19.2.6.7 for
details on self-refresh mode. The EMIFB memory controller will complete any outstanding accesses
and backlogged refresh cycles and then place the EMIFB memory controller in self-refresh mode.
• To enable clock stopping, MCLKSTOP_EN bit in SDRFC must be set to 1. Refer to Section 19.4.2 for
details.
• Then, program the LPSC of EMIFB to disable VCLK. For details on how to program the PSC, see the
Power and Sleep Controller (PSC) chapter.
Clocks should not be stopped while data transfer is in progress. Only after transfer is completed, clock
stop request should be issued.
To turn clocks back on and start using EMIFB:
• Program the LPSC of EMIFB to enable VCLK.
• Clear MCLKSTOP_EN bit in SDRFC to 0.
• Bring EMIFB out of self-refresh mode. Refer to Section 19.2.6.7 for details on self-refresh mode.
LPSC Auto Sleep and Auto Wake
Apart from disable and enable, EMIFB memory controller can make use of auto sleep and auto wake
facility. Following describes the procedure to be followed to put EMIFB memory controller in auto sleep
state:
• EMIFB should be put to self-refresh mode before stopping the clock. Refer to Section 19.2.6.7 for
details on self-refresh mode. The EMIFB memory controller will complete any outstanding accesses
and backlogged refresh cycles and then place the 0EMIFB memory controller in self-refresh mode.
• To enable clock stopping, MCLKSTOP_EN bit in SDRFC must be set to 1. Refer to Section 19.4.2 for
details.
• Then, program the LPSC of EMIFB for auto sleep, to gate off the clocks.
Register and memory access requests are honored while EMIFB is in auto sleep state. When EMIFB sees
a request while it is in auto sleep state, it automatically returns to enable state, processes the request, and
returns back to auto sleep state until further requests come.
On frequent requests, EMIFB switches between auto sleep and enable states. To bring EMIFB back to the
enable state permanently, auto wake can be used. Following procedure is followed for performing auto
wake.
• Program the LPSC of EMIFB for auto wake.
• Clear MCLKSTOP_EN bit in SDRFC to 0.
• Bring EMIFB out of self-refresh mode. Refer to Section 19.2.6.7 for details on self-refresh mode.
After auto wake, EMIFB is in enable state and clocks run continuously.