Texas Instruments TMS570LC4357 - Page 11

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11
SPNU563A–March 2018
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Contents
17.3.2 RTI Timebase Control Register (RTITBCTRL) ............................................................. 597
17.3.3 RTI Capture Control Register (RTICAPCTRL).............................................................. 598
17.3.4 RTI Compare Control Register (RTICOMPCTRL) ......................................................... 599
17.3.5 RTI Free Running Counter 0 Register (RTIFRC0) ......................................................... 600
17.3.6 RTI Up Counter 0 Register (RTIUC0)........................................................................ 600
17.3.7 RTI Compare Up Counter 0 Register (RTICPUC0) ........................................................ 601
17.3.8 RTI Capture Free Running Counter 0 Register (RTICAFRC0)........................................... 601
17.3.9 RTI Capture Up Counter 0 Register (RTICAUC0).......................................................... 602
17.3.10 RTI Free Running Counter 1 Register (RTIFRC1)........................................................ 602
17.3.11 RTI Up Counter 1 Register (RTIUC1) ...................................................................... 603
17.3.12 RTI Compare Up Counter 1 Register (RTICPUC1)....................................................... 604
17.3.13 RTI Capture Free Running Counter 1 Register (RTICAFRC1) ......................................... 605
17.3.14 RTI Capture Up Counter 1 Register (RTICAUC1) ........................................................ 605
17.3.15 RTI Compare 0 Register (RTICOMP0)..................................................................... 606
17.3.16 RTI Update Compare 0 Register (RTIUDCP0)............................................................ 606
17.3.17 RTI Compare 1 Register (RTICOMP1)..................................................................... 607
17.3.18 RTI Update Compare 1 Register (RTIUDCP1)............................................................ 607
17.3.19 RTI Compare 2 Register (RTICOMP2)..................................................................... 608
17.3.20 RTI Update Compare 2 Register (RTIUDCP2)............................................................ 608
17.3.21 RTI Compare 3 Register (RTICOMP3)..................................................................... 609
17.3.22 RTI Update Compare 3 Register (RTIUDCP3)............................................................ 609
17.3.23 RTI Timebase Low Compare Register (RTITBLCOMP) ................................................. 610
17.3.24 RTI Timebase High Compare Register (RTITBHCOMP) ................................................ 610
17.3.25 RTI Set Interrupt Enable Register (RTISETINTENA) .................................................... 611
17.3.26 RTI Clear Interrupt Enable Register (RTICLEARINTENA) .............................................. 613
17.3.27 RTI Interrupt Flag Register (RTIINTFLAG) ................................................................ 615
17.3.28 Digital Watchdog Control Register (RTIDWDCTRL) ..................................................... 616
17.3.29 Digital Watchdog Preload Register (RTIDWDPRLD)..................................................... 617
17.3.30 Watchdog Status Register (RTIWDSTATUS) ............................................................. 618
17.3.31 RTI Watchdog Key Register (RTIWDKEY) ................................................................ 619
17.3.32 RTI Digital Watchdog Down Counter (RTIDWDCNTR) .................................................. 620
17.3.33 Digital Windowed Watchdog Reaction Control (RTIWWDRXNCTRL) ................................. 620
17.3.34 Digital Windowed Watchdog Window Size Control (RTIWWDSIZECTRL)............................ 621
17.3.35 RTI Compare Interrupt Clear Enable Register (RTIINTCLRENABLE)................................. 622
17.3.36 RTI Compare 0 Clear Register (RTICMP0CLR) .......................................................... 623
17.3.37 RTI Compare 1 Clear Register (RTICMP1CLR) .......................................................... 623
17.3.38 RTI Compare 2 Clear Register (RTICMP2CLR) .......................................................... 624
17.3.39 RTI Compare 3 Clear Register (RTICMP3CLR) .......................................................... 624
18 Cyclic Redundancy Check (CRC) Controller Module ............................................................. 625
18.1 Overview ................................................................................................................... 626
18.1.1 Features.......................................................................................................... 626
18.1.2 Block Diagram................................................................................................... 626
18.2 Module Operation......................................................................................................... 628
18.2.1 General Operation.............................................................................................. 628
18.2.2 CRC Modes of Operation...................................................................................... 628
18.2.3 PSA Signature Register........................................................................................ 629
18.2.4 PSA Sector Signature Register ............................................................................... 630
18.2.5 CRC Value Register............................................................................................ 631
18.2.6 Raw Data Register ............................................................................................. 631
18.2.7 Example DMA Controller Setup............................................................................... 631
18.2.8 Pattern Count Register......................................................................................... 633
18.2.9 Sector Count Register/Current Sector Register ............................................................ 633
18.2.10 Interrupt......................................................................................................... 634