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SPNU563A–March 2018
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List of Tables
35-5. Counter-Compare Submodule Registers ............................................................................ 2011
35-6. Counter-Compare Submodule Key Signals.......................................................................... 2012
35-7. Action-Qualifier Submodule Registers................................................................................ 2015
35-8. Action-Qualifier Submodule Possible Input Events ................................................................. 2016
35-9. Action-Qualifier Event Priority for Up-Down-Count Mode.......................................................... 2018
35-10. Action-Qualifier Event Priority for Up-Count Mode.................................................................. 2018
35-11. Action-Qualifier Event Priority for Down-Count Mode .............................................................. 2018
35-12. Behavior if CMPA/CMPB is Greater than the Period............................................................... 2018
35-13. Dead-Band Generator Submodule Registers........................................................................ 2028
35-14. Classical Dead-Band Operating Modes ............................................................................. 2030
35-15. Dead-Band Delay Values in μS as a Function of DBFED and DBRED.......................................... 2032
35-16. PWM-Chopper Submodule Registers ................................................................................ 2033
35-17. Possible Pulse Width Values for VCLK3 = 100 MHz............................................................... 2035
35-18. Trip-Zone Submodule Registers ...................................................................................... 2038
35-19. Possible Actions On a Trip Event ..................................................................................... 2039
35-20. Event-Trigger Submodule Registers ................................................................................. 2045
35-21. Digital Compare Submodule Registers............................................................................... 2049
35-22. ePWM Module Control and Status Register Set Grouped by Submodule....................................... 2070
35-23. Time-Base Status Register (TBSTS) Field Descriptions........................................................... 2071
35-24. Time-Base Control Register (TBCTL) Field Descriptions.......................................................... 2072
35-25. Time-Base Phase Register (TBPHS) Field Descriptions........................................................... 2074
35-26. Time-Base Period Register (TBPRD) Field Descriptions .......................................................... 2074
35-27. Time-Base Counter Register (TBCTR) Field Descriptions......................................................... 2074
35-28. Counter-Compare Control Register (CMPCTL) Field Descriptions .............................................. 2075
35-29. Counter-Compare A Register (CMPA) Field Descriptions ......................................................... 2076
35-30. Counter-Compare B Register (CMPB) Field Descriptions ......................................................... 2077
35-31. Action-Qualifier Output A Control Register (AQCTLA) Field Descriptions ...................................... 2078
35-32. Action-Qualifier Software Force Register (AQSFRC) Field Descriptions ........................................ 2079
35-33. Action-Qualifier Output B Control Register (AQCTLB) Field Descriptions ...................................... 2080
35-34. Action-qualifier Continuous Software Force Register (AQCSFRC) Field Descriptions ........................ 2081
35-35. Dead-Band Generator Control Register (DBCTL) Field Descriptions ............................................ 2082
35-36. Dead-Band Generator Falling Edge Delay Register (DBFED) Field Descriptions.............................. 2084
35-37. Dead-Band Generator Rising Edge Delay Register (DBRED) Field Descriptions.............................. 2084
35-38. Trip Zone Digital Compare Event Select Register (TZDCSEL) Field Descriptions............................. 2085
35-39. Trip-Zone Submodule Select Register (TZSEL) Field Descriptions ............................................. 2086
35-40. Trip-Zone Enable Interrupt Register (TZEINT) Field Descriptions................................................ 2088
35-41. Trip-Zone Control Register (TZCTL) Field Descriptions ........................................................... 2089
35-42. Trip-Zone Clear Register (TZCLR) Field Descriptions ............................................................. 2090
35-43. Trip-Zone Flag Register (TZFLG) Field Descriptions............................................................... 2091
35-44. Trip-Zone Force Register (TZFRC) Field Descriptions............................................................. 2092
35-45. Event-Trigger Selection Register (ETSEL) Field Descriptions ................................................... 2093
35-46. Event-Trigger Flag Register (ETFLG) Field Descriptions.......................................................... 2094
35-47. Event-Trigger Prescale Register (ETPS) Field Descriptions ..................................................... 2095
35-48. Event-Trigger Force Register (ETFRC) Field Descriptions ....................................................... 2097
35-49. Event-Trigger Clear Register (ETCLR) Field Descriptions......................................................... 2098
35-50. PWM-Chopper Control Register (PCCTL) Bit Descriptions ....................................................... 2099
35-51. Digital Compare A Control Register (DCACTL) Field Descriptions............................................... 2101
35-52. Digital Compare Trip Select (DCTRIPSEL) Field Descriptions.................................................... 2102
35-53. Digital Compare Filter Control Register (DCFCTL) Field Descriptions........................................... 2103
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