Texas Instruments TMS320 2833 Series User Manual

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SPRUI07–March 2020
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System Control and Interrupts
1.5 Peripheral Frames
This section describes the peripheral frames. It also describes the device emulation registers.
1.5.1 Peripheral Frame Registers
The 2833x, 2823x devices contain four peripheral register spaces. The spaces are categorized as follows:
• Peripheral Frame 0: These are peripherals that are mapped directly to the CPU memory bus. See
Table 1-86.
• Peripheral Frame 1: These are peripherals that are mapped to the 32-bit peripheral bus. See Table 1-
87.
• Peripheral Frame 2: These are peripherals that are mapped to the 16-bit peripheral bus. See Table 1-
88.
• Peripheral Frame 3: McBSP registers are mapped to this. See Table 1-89.
(1)
Registers in Frame 0 support 16-bit and 32-bit accesses.
(2)
If registers are EALLOW protected, then writes cannot be performed until the EALLOW instruction is executed. The EDIS
instruction disables writes to prevent stray code or pointers from corrupting register contents.
(3)
The Flash Registers are also protected by the Code Security Module (CSM).
Table 1-86. Peripheral Frame 0 Registers
(1)
Name Address Range Size (×16) Access Type
(2)
Device Emulation Registers 0x00 0880 - 0x00 09FF 384 EALLOW protected
FLASH Registers
(3)
0x00 0A80 - 0x00 0ADF 96 EALLOW protected
Code Security Module Registers 0x00 0AE0 - 0x00 0AEF 16 EALLOW protected
ADC registers (dual-mapped) (0 wait, read
only)
0x00 0B00 - 0x00 0B1F 32 Not EALLOW protected
XINTF Registers 0x00 0B20 - 0x00 0B3F 32 Not EALLOW protected
CPU–TIMER0/1/2 Registers 0x00 0C00 - 0x00 0C3F 64 Not EALLOW protected
PIE Registers 0x00 0CE0 - 0x00 0CFF 32 Not EALLOW protected
PIE Vector Table 0x00 0D00 - 0x00 0DFF 256 EALLOW protected
DMA Registers 0x00 1000 - 0x00 11FF 512 EALLOW protected
(1)
Peripheral Frame 1 allows 16-bit and 32-bit accesses. All 32-bit accesses are aligned to even address boundaries.
Table 1-87. Peripheral Frame 1 Registers
Name Address Range Size (x16) Access Type
(1)
eCANA Registers 0x6000 - 0x60FF 256 Some eCAN control registers (and selected bits in
other eCAN control registers) are EALLOW-
protected. eCAN control registers require 32-bit
access.
eCANA Mailbox RAM 0x6100 - 0x61FF 256 Not EALLOW-protected
eCANB Registers 0x6200 - 0x62FF 256 Some eCAN control registers (and selected bits in
other eCAN control registers) are EALLOW-
protected. eCAN control registers require 32-bit
access.
eCANB Mailbox RAM 0x6300 - 0x63FF 256 Not EALLOW-protected
ePWM1 Registers 0x6800 - 0x683F 64
Some ePWM registers are EALLOW-protected. See
Section 1.5.2.
ePWM2 Registers 0x6840 - 0x687F 64
ePWM3 Registers 0x6880 - 0x68BF 64
ePWM4 Registers 0x68C0 - 0x68FF 64
ePWM5 Registers 0x6900 - 0x693F 64
ePWM6 Registers 0x6940 - 0x697F 64

Texas Instruments TMS320 2833 Series Specifications

General

Brand	Texas Instruments
Model	TMS320 2833 Series
Category	Controller
Language	English