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Texas Instruments TMS320 2833 Series User Manual

Texas Instruments TMS320 2833 Series
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QPOSCTL:PCSPW
12
Pulse
stretcher
QFLG:PCM
QPOSCNT
32
QPOSCMP
QFLG:PCR
32
QPOSCTL:PCSHDW
QPOSCTL:PCLOAD
0
1
QPOSCTL:PCPOL
PCSOUT
PCEVENT
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Position Counter and Control Unit (PCCU)
403
SPRUI07March 2020
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Copyright © 2020, Texas Instruments Incorporated
Enhanced Quadrature Encoder Pulse (eQEP)
6.5.4 eQEP Position-compare Unit
The eQEP peripheral includes a position-compare unit that is used to generate a sync output and/or
interrupt on a position-compare match. Figure 6-12 shows a diagram. The position-compare (QPOSCMP)
register is shadowed and shadow mode can be enabled or disabled using the QPOSCTL[PSSHDW] bit. If
the shadow mode is not enabled, the CPU writes directly to the active position compare register.
Figure 6-12. eQEP Position-compare Unit
In shadow mode, you can configure the position-compare unit (QPOSCTL[PCLOAD]) to load the shadow
register value into the active register on the following events, and to generate the position-compare ready
(QFLG[PCR]) interrupt after loading.
Load on compare match
Load on position-counter zero event
The position-compare match (QFLG[PCM]) is set when the position-counter value (QPOSCNT) matches
with the active position-compare register (QPOSCMP) and the position-compare sync output of the
programmable pulse width is generated on compare-match to trigger an external device.
For example, if QPOSCMP = 2, the position-compare unit generates a position-compare event on 1 to 2
transitions of the eQEP position counter for forward counting direction and on 3 to 2 transitions of the
eQEP position counter for reverse counting direction (see Figure 6-13).
See the register section for the layout of the eQEP Position-Compare Control Register (QPOSCTL) and
description of the QPOSCTL bit fields.

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Texas Instruments TMS320 2833 Series Specifications

General IconGeneral
BrandTexas Instruments
ModelTMS320 2833 Series
CategoryController
LanguageEnglish

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