McBSP Registers
www.ti.com
768
SPRUI07–March 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Multichannel Buffered Serial Port (McBSP)
Table 12-94. Use of the Receive Channel Enable Registers
Number of
Selectable
Channels
Block Assignments Channel Assignments
RCERx Block Assigned Bit in RCERx Channel Assigned
32
(RMCME = 0)
RCERA Channels n to (n + 15) RCE0 Channel n
RCE1 Channel (n + 1)
RCE2 Channel (n + 2)
: :
The block of channels is chosen with
the RPABLK bits.
RCE15 Channel (n + 15)
RCERB Channels m to (m + 15) RCE0 Channel m
RCE1 Channel (m + 1)
RCE2 Channel (m + 2)
: :
The block of channels is chosen with
the RPBBLK bits.
RCE15 Channel (m + 15)
128
(RMCME = 1)
RCERA Block 0 RCE0 Channel 0
RCE1 Channel 1
RCE2 Channel 2
: :
RCE15 Channel 15
RCERB Block 1 RCE0 Channel 16
RCE1 Channel 17
RCE2 Channel 18
: :
RCE15 Channel 31
RCERC Block 2 RCE0 Channel 32
RCE1 Channel 33
RCE2 Channel 34
: :
RCE15 Channel 47
RCERD Block 3 RCE0 Channel 48
RCE1 Channel 49
RCE2 Channel 50
: :
RCE15 Channel 63
RCERE Block 4 RCE0 Channel 64
RCE1 Channel 65
RCE2 Channel 66
: :
RCE15 Channel 79
RCERF Block 5 RCE0 Channel 80
RCE1 Channel 81
RCE2 Channel 82
: :
RCE15 Channel 95
RCERG Block 6 RCE0 Channel 96
RCE1 Channel 97
RCE2 Channel 98
: :
RCE15 Channel 111