www.ti.com
eCAP Registers
377
SPRUI07–March 2020
Submit Documentation Feedback
Copyright © 2020, Texas Instruments Incorporated
Enhanced Capture (eCAP)
5.8.2.5 CAP3 Register (Offset = 8h) [reset = 0h]
CAP3 is shown in Figure 5-22 and described in Table 5-8.
Return to the Summary Table.
Capture 3 Register
Figure 5-22. CAP3 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CAP3
R/W-0h
Table 5-8. CAP3 Register Field Descriptions
Bit Field Type Reset Description
31-0 CAP3 R/W 0h
In CMP mode, this is a time-stamp capture register.
In APWM mode, this is the period shadow (APRD) register. You can
update the PWM period value through this register. CAP3 (APRD)
shadows CAP1 in this mode.
Reset type: SYSRSn