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eCAP Registers
375
SPRUI07–March 2020
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Enhanced Capture (eCAP)
5.8.2.3 CAP1 Register (Offset = 4h) [reset = 0h]
CAP1 is shown in Figure 5-20 and described in Table 5-6.
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Capture 1 Register
Figure 5-20. CAP1 Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
CAP1
R/W-0h
Table 5-6. CAP1 Register Field Descriptions
Bit Field Type Reset Description
31-0 CAP1 R/W 0h
This register can be loaded (written) by:
- Time-Stamp counter value (TSCTR) during a capture event
- Software - may be useful for test purposes or initialization
- ARPD shadow register (CAP3) when used in APWM mode
Reset type: SYSRSn
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