eCAN Registers
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SPRUI07–March 2020
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Controller Area Network (CAN)
13.8.14 CAN Error Counter Registers (CANTEC/CANREC)
The CAN module contains two error counters: the receive error counter (CANREC) and the transmit error
counter (CANTEC). The values of both counters can be read via the CPU interface. These counters are
incremented or decremented according to the CAN protocol specification version 2.0.
Figure 13-23. Transmit-Error-Counter Register (CANTEC)
31 8 7 0
Reserved TEC
R-x R-0
LEGEND: R = Read only; -n = value after reset
Figure 13-24. Receive-Error-Counter Register (CANREC)
31 8 7 0
Reserved REC
R-x R-0
LEGEND: R = Read only; -n = value after reset
After reaching or exceeding the error passive limit (128), the receive error counter will not be increased
anymore. When a message was received correctly, the counter is set again to a value between 119 and
127 (compare with CAN specification).
After reaching the bus-off state, the transmit error counter is undefined while the receive error counter
changes its function. After reaching the bus-off state, the receive error counter is cleared. It is then
incremented after every 11 consecutive recessive bits on the bus. These 11 bits correspond to the gap
between two frames on the bus. If the counter reaches 128, the module automatically changes back to the
bus-on status if this feature is enabled (Auto Bus On bit (ABO) (CANMC.7) set). All internal flags are reset
and the error counters are cleared. After leaving initialization mode, the error counters are cleared.
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