Registers
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SPRUI07–March 2020
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Enhanced Pulse Width Modulator (ePWM) Module
Figure 3-72. Action-Qualifier Software Force Register (AQSFRC)
15 8
Reserved
R-0
7 6 5 4 3 2 1 0
RLDCSF OTSFB ACTSFB OTSFA ACTSFA
R/W-0 R/W-0 R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 3-32. Action-Qualifier Software Force Register (AQSFRC) Field Descriptions
Bit Field Value Description
15:8 Reserved
7:6 RLDCSF AQCSFRC Active Register Reload From Shadow Options
00 Load on event counter equals zero
01 Load on event counter equals period
10 Load on event counter equals zero or counter equals period
11 Load immediately (the active register is directly accessed by the CPU and is not loaded from the
shadow register).
5 OTSFB One-Time Software Forced Event on Output B
0 Writing a 0 (zero) has no effect. Always reads back a 0
This bit is auto cleared once a write to this register is complete, i.e., a forced event is initiated.)
This is a one-shot forced event. It can be overridden by another subsequent event on output B.
1 Initiates a single s/w forced event
4:3 ACTSFB Action when One-Time Software Force B Is invoked
00 Does nothing (action disabled)
01 Clear (low)
10 Set (high)
11 Toggle (Low -> High, High -> Low)
Note: This action is not qualified by counter direction (CNT_dir)
2 OTSFA One-Time Software Forced Event on Output A
0 Writing a 0 (zero) has no effect. Always reads back a 0.
This bit is auto cleared once a write to this register is complete ( i.e., a forced event is initiated).
1 Initiates a single software forced event
1:0 ACTSFA Action When One-Time Software Force A Is Invoked
00 Does nothing (action disabled)
01 Clear (low)
10 Set (high)
11 Toggle (Low → High, High → Low)
Note: This action is not qualified by counter direction (CNT_dir)
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